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24 FPGA Setup: Created some BAT files for WINDOWS users. olivier.girard 5435d 05h /
23 Renamed the "openMSP430.inc" file to "openMSP430_defines.v" & added the "timescale.v" file.
In order to follow the same structure as other OpenCores projects, the timescale and the defines are now included from within the Verilog files (using the `include construct).		 olivier.girard 5456d 04h /
22 Updated some links in the HTML documentation. olivier.girard 5469d 01h /
21 added discussion group info olivier.girard 5481d 02h /
20 added some SVN ignore patterns.
small update to html documentation		 olivier.girard 5481d 22h /
19 added SVN property for keywords olivier.girard 5481d 22h /
18 Updated headers with SVN info olivier.girard 5481d 22h /
17 Updated header with SVN info olivier.girard 5481d 23h /
16 Updated header with SVN info olivier.girard 5481d 23h /
15 Updated headers with SVN info olivier.girard 5482d 00h /
14 Updated headers with SVN info olivier.girard 5482d 00h /
13 Completed PDF documentation olivier.girard 5482d 00h /
12 some more typo fixes... olivier.girard 5483d 23h /
11 aesthetic changes olivier.girard 5488d 00h /
10 Update software development tools documentation olivier.girard 5488d 00h /
9 Added pictures for the software development tools documentation olivier.girard 5488d 00h /
8 Created ODT document olivier.girard 5493d 00h /
7 olivier.girard 5493d 00h /
6 Some more SVN ignore properties... olivier.girard 5504d 00h /
5 Added some ignore pattern properties... olivier.girard 5504d 00h /
4 Added HTML documentation olivier.girard 5504d 00h /
3 update FPGA inc file to match the CORE version olivier.girard 5516d 11h /
2 Upload complete openMSP430 project to the SVN repository olivier.girard 5516d 23h /
1 The project was created and the structure was created root 5517d 00h /

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