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Rev Log message Author Age Path
82 Update Actel example project:
- synthesis scripts.
- Spacewar demo program.
- SVN ignore patterns for diverse directories		 olivier.girard 4965d 18h /
81 Initial synthesis, P&R setup for the Actel example project. olivier.girard 4968d 16h /
80 Create initial version of the Actel FPGA implementation example. olivier.girard 4969d 01h /
79 Update the GPIO peripheral to fix a potential synchronization issue. olivier.girard 4980d 18h /
78 update windows executable files olivier.girard 4982d 18h /
77 Tool script update with additional checks:
- execution of the "msp430-objcopy" ran properly
- add a timeout delay to wait for the generated bin file
- check if the size of the ELF file program section is the same as the available program memory.		 olivier.girard 4982d 18h /
76 Add possibility to simulate C code within the "core" environment. olivier.girard 4985d 17h /
75 Update development tools windows executable to support memories whose size are not a power of 2. olivier.girard 5067d 17h /
74 Update serial debug interface to support memories with a size which is not a power of 2.
Update the software tools accordingly.		 olivier.girard 5067d 18h /
73 Update all bash scripts headers with "#!/bin/bash" instead of "#!/bin/sh".
This will prevent compatibility problems in systems where bash isn't the default shell.		 olivier.girard 5092d 19h /
72 Expand configurability options of the program and data memory sizes. olivier.girard 5094d 19h /
71 Update the FPGA example projects with the newer openMSP430 core including the hardware multiplier. olivier.girard 5241d 18h /
70 Add Area and Speed documentation. olivier.girard 5241d 21h /
69 Update HTML documentation with 16x16 hardware multiplier info. olivier.girard 5242d 01h /
68 Update synthesis scripts with the hardware multiplier support. olivier.girard 5242d 02h /
67 Added 16x16 Hardware Multiplier. olivier.girard 5242d 02h /
66 The peripheral templates are now under BSD license.
Developers of new peripherals based on these templates won't have to disclose their code.		 olivier.girard 5242d 06h /
65 Add possibility to disable waveform dumping by setting the OMSP_NODUMP environment variable to 1. olivier.girard 5252d 16h /
64 Add Actel synthesis environment for size and speed analysis. olivier.girard 5263d 02h /
63 Add Altera synthesis environment for size and speed analysis. olivier.girard 5263d 02h /
62 Add Xilinx synthesis environment for size&speed analysis. olivier.girard 5263d 04h /
61 Update openMSP430 rtl. olivier.girard 5273d 16h /
60 Cleanup of the PC (R0) generation logic.
Formal equivalence was shown between the new and old code with Synopsys' Formality (to make sure that nothing has been broken :-P ).		 olivier.girard 5273d 17h /
59 Update the FPGA projects with the latest core design updates. olivier.girard 5275d 15h /
58 Update the debug hardware breakpoint verification patterns to reflect the latest design updates. olivier.girard 5275d 15h /
57 Update design to exclude the range mode from the debug hardware breakpoint units. As this feature is not used by GDB, it has been disabled in order to improve the timings and save a bit of area/utilisation.
Note that if required, this feature can be re-enabled through the `HWBRK_RANGE define located in the "openMSP430_defines.v" file.		 olivier.girard 5275d 15h /
56 Update Design Compiler Synthesis scripts. olivier.girard 5279d 22h /
55 Add a "sandbox" test pattern to play around with the simulation :-P olivier.girard 5280d 17h /
54 Update FPGA projects with the combinatorial loop fixed. olivier.girard 5280d 20h /
53 Fixed the following combinatorial timing loop:
1- irq_detect (omsp_frontend)
2- decode (omsp_frontend)
3- dbg_swbrk (omsp_dbg)
4- halt_flag_set (omsp_dbg)
6- dbg_halt_cmd (omsp_dbg)
7- irq_detect (omsp_frontend)

Without this fix, problem could occur whenever an IRQ request arrives during a software breakpoint instruction fetch.		 olivier.girard 5280d 20h /

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