OpenCores
URL https://opencores.org/ocsvn/openrisc_2011-10-31/openrisc_2011-10-31/trunk

Subversion Repositories openrisc_2011-10-31

[/] - Rev 161

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
161 Explanation of this directory. jeremybennett 5157d 08h /
160 A directory for patches to the GNU mainline distributions that add OR32 support. jeremybennett 5157d 08h /
159 Removed - now all in unified source tree. jeremybennett 5157d 08h /
158 Restructuring GNU tools into a unified source directory, matching the FSF repository jeremybennett 5157d 08h /
157 Restructuring GNU tools into a unified source directory, matching the FSF repository jeremybennett 5157d 08h /
156 Restructuring GNU tools into a unified source directory, matching the FSF repository jeremybennett 5157d 08h /
155 File to explain the structure of this directory. jeremybennett 5157d 08h /
154 Restructuring the OpenRISC GNU tools distribution to use a unified source tree, mirroring the approach used by the FSF mainline distribution. jeremybennett 5157d 08h /
153 New directory, to allow creation of a unified source tree for GNU tools and newlib. This matches the approach used by the main FSF distribution. jeremybennett 5157d 08h /
152 Changes to allow building from unified source tree, to facilitate newlib integration and to fix a bug in the machine definition for OR32. jeremybennett 5157d 08h /
151 OR1200 rel3 (added some files that were not checked-in earlier) marcus.erlandsson 5159d 01h /
150 removed Linux directories marcus.erlandsson 5159d 09h /
149 Initial commit of the GCC test suite jeremybennett 5160d 11h /
148 The port of newlib for OpenRISC. This version just works with Or1ksim. There is code for a UART based version, but that needs some more work.

This allows GCC to be tested using Or1ksim.
jeremybennett 5161d 01h /
147 Integration of Or1ksim as a GDB simulator. jeremybennett 5161d 02h /
146 Restructured Or1k implementation. Now works without frame pointer, using unified code approach. jeremybennett 5161d 02h /
145 Fixed bug in data structure initialization. jeremybennett 5161d 02h /
144 Missing file to fix bug 1797. jeremybennett 5161d 04h /
143 Fix building for Cygwin with GCC 3.4.4 (Bug 1797). Fix breakpoints with instruction cache enabled (Bug 195). jeremybennett 5161d 06h /
142 added OpenRISC version rel3 marcus.erlandsson 5161d 09h /
141 added OpenRISC version rel3 marcus.erlandsson 5161d 09h /
140 Changes to ORPMon, probably broke flash loading, improved TFTP julius 5162d 09h /
139 added rel3 info in tags-directory, to avoid misunderstanding marcus.erlandsson 5163d 07h /
138 fixed check-in mistake (remove additional directory level) marcus.erlandsson 5163d 08h /
137 Release-2 of the OR1200 processor, latest version is always located in trunk-directory marcus.erlandsson 5163d 09h /
136 Adding crossbild script, updating MOF install script to use or1ksim-0.4.0 julius 5164d 05h /
135 Tagging the 0.4.0 stable release of Or1ksim jeremybennett 5169d 10h /
134 Updates for stable release 0.4.0 jeremybennett 5169d 10h /
133 Patches for floating point support jeremybennett 5173d 06h /
132 This fixes files formatted with DOS line endings (something that should be sorted out outside SVN). jeremybennett 5173d 06h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.