OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] - Rev 1015

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1015 Host type was not recognized. simons 7988d 10h /
1014 added _JBLEN definition for or1k ivang 7988d 23h /
1013 ORP architecture supported. simons 7989d 01h /
1012 This commit was manufactured by cvs2svn to create tag 'rel_4'. 7989d 19h /
1011 Removed some commented RTL. Fixed SR/ESR flag bug. lampret 7989d 19h /
1010 Import ivang 7993d 22h /
1009 Import ivang 7993d 22h /
1008 Import ivang 7993d 22h /
1007 Import ivang 7993d 23h /
1006 Import ivang 7993d 23h /
1005 Import ivang 7993d 23h /
1004 Now every ramdisk image should have init program. simons 7994d 07h /
1003 cuc temporary files are deleted upon exiting markom 7994d 07h /
1002 Now every ramdisk image should have init program. simons 7994d 07h /
1001 fixed load/store state machine verilog generation errors markom 7994d 07h /
1000 IC/DC cache enable routines fixed. simons 7994d 08h /
999 Now every ramdisk image should have init program. simons 7994d 09h /
998 added missing fout initialization markom 7994d 11h /
997 PRINTF should be used instead of printf; command redirection repaired markom 7994d 12h /
996 some minor bugs fixed markom 7995d 10h /
995 This commit was manufactured by cvs2svn to create tag 'rel_3'. 7995d 18h /
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7995d 18h /
993 Fixed IMMU bug. lampret 7995d 18h /
992 A bug when cache enabled and bus error comes fixed. simons 7996d 03h /
991 Different memory controller. simons 7996d 03h /
990 Test is now complete. simons 7996d 03h /
989 c++ is making problems so, for now, it is excluded. simons 7997d 11h /
988 ORP architecture supported. simons 7998d 03h /
987 ORP architecture supported. simons 7998d 10h /
986 outputs out of function are not registered anymore markom 7998d 11h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.