URL https://opencores.org/ocsvn/or1k/or1k/trunk

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[/] - Rev 806

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Rev	Log message	Author	Age	Path
806	uart now partially uses scheduler	markom	8120d 19h	/
805	kbd, fb, vga devices now uses scheduler	markom	8120d 20h	/
804	memory regions can now overlap with MC -- not according to MC spec	markom	8121d 14h	/
803	Free irq handler fixed.	simons	8124d 07h	/
802	Cache and tick timer tests fixed.	simons	8125d 18h	/
801	l.muli instruction added	markom	8127d 14h	/
800	Bug fixed.	simons	8128d 12h	/
799	Wrapping around 512k boundary to simulate real hw.	simons	8132d 05h	/
798	Hardware scroll added. This possible due to the fact that crt is wrapping around 512k boundary.	simons	8132d 05h	/
797	Changed hardcoded address for fake MC to use a define.	lampret	8132d 06h	/
796	Removed unused ports wb_clki and wb_rst_i	lampret	8132d 06h	/
795	Added a directive to ignore signed division variables that are only used in simulation.	lampret	8132d 10h	/
794	Added again just recently removed full_case directive	lampret	8132d 10h	/
793	Added synthesis off/on for timescale.v included file.	lampret	8132d 10h	/
792	Fixed port names that changed.	lampret	8132d 10h	/
791	Fixed some ports in instnatiations that were removed from the modules	lampret	8132d 11h	/
790	Changed comment about synopsys to _synopsys_ because synthesis was complaining about unknown directives	lampret	8132d 11h	/
789	Added response from memory controller (addr 0x60000000)	lampret	8132d 11h	/
788	Some of the warnings fixed.	lampret	8132d 12h	/
787	Added romfs.tgz	lampret	8133d 06h	/
786	Moved UCF constraint file to the backend directory.	lampret	8133d 06h	/
785	Added XSV specific documentation.	lampret	8133d 06h	/
784	Added soem missing files.	lampret	8133d 06h	/
783	Added sim directory and sub files/dirs.	lampret	8133d 06h	/
782	Added the old SW directory. It needs to be updated for the new ORP environment and test cases moved to sw directory.	lampret	8133d 06h	/
781	Added design compiler scripts. However these are not ready for use yet .... They need to be updated for the ORP sources and ORP sources need to be updated as well.	lampret	8133d 07h	/
780	Added libraries.	lampret	8133d 07h	/
779	Added bench directory	lampret	8133d 07h	/
778	Added second type of Virtual Silicon two-port SRAM (for register file). Changed defines for VS STP RAMs.	lampret	8133d 08h	/
777	Changed define name from OR1200_MEM2REG_FAST to OR1200_IMPL_MEM2REG2	lampret	8133d 08h	/

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[/] - Rev 806

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