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Subversion Repositories rtf65002

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Rev Log message Author Age Path
35 - several bug fixes
- mul,mod,div immediates mode than 8 bits
- page two opcode fix on cache miss
- setting upper pc bits in emulation mode (store)
robfinch 3917d 02h /
34 - latest bootrom.asm
- and assembler
robfinch 3927d 16h /
33 - most recent docs robfinch 3927d 16h /
32 - many changes
- new instructions
- code reorganization
robfinch 3927d 16h /
31 - miscellaneous updates
- unimplemented instruction vector
-
robfinch 3937d 14h /
30 - added additional branches
- modified the pc increment
- modified interrupts, all vector through BRK
- registered some decodes
- added SUPPORT macros to allow core trimming
robfinch 3937d 14h /
29 - updated assembler, increased instruction support robfinch 3943d 09h /
28 - updated bootrom, robfinch 3943d 09h /
27 - most recent doc robfinch 3944d 16h /
26 - latest bootrom.asm
- fixes to assembler
robfinch 3944d 16h /
25 - add EXEC and ATNI instructions
- fix store byte zero page indexed
- fix break instruction
robfinch 3944d 16h /
24 - fixes to assembler robfinch 3950d 14h /
23 - added subtract immediate from sp
- added stack relative addressing mode
- added move positive, move negative instructions
- fix: TSA instruction
robfinch 3950d 14h /
22 - fix indirect load robfinch 3952d 04h /
21 - config processor mode on reset
- D flag flags extended precision for add/sub
- added software interrupt call facility
- unimplmented opcode vectoring
- bus error signal support
- merge load states to reduce core size
- zero out ir during interrupt
robfinch 3952d 09h /
20 - greater separation of emulation and native mode in source code
- fix instruction buffer fetch for non-cached accesses
- fix the sta (d),y instruction
robfinch 3953d 15h /
19 - added multibit shifts
- added eight bit CMP instruction
robfinch 3954d 13h /
18 - added shift instruction to assembler
- fixed acouple of minor bugs
robfinch 3954d 13h /
17 - updated docs robfinch 3954d 13h /
16 - tiny basic robfinch 3955d 13h /
15 - updates to assembler
- interrupt support in bootrom.asm
-
robfinch 3955d 13h /
14 - updated docs robfinch 3955d 13h /
13 - fix overflow in immediate mode
- fix bit instruction N,V setting
- add vector base register, modified interrupt vectoring
robfinch 3955d 14h /
12 - added LFSR and TICK count special registers
- added MUL/DIV/MOD instructions
robfinch 3956d 14h /
11 - added bootrom.asm
- fixed bugs in assembler
robfinch 3958d 19h /
10 - fix rind mode in 32 bit mode
- fix flag update in 32 bit mode for RR instructions
- initialize cache tags
- added flag to disable ints until after sp load
robfinch 3958d 19h /
9 updateing docs robfinch 3959d 19h /
8 updateing docs robfinch 3959d 19h /
7 updateing docs robfinch 3959d 19h /
6 setting up project robfinch 3962d 02h /

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