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URL https://opencores.org/ocsvn/spacewiresystemc/spacewiresystemc/trunk

Subversion Repositories spacewiresystemc

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Rev Log message Author Age Path
22 Adding files work to altera fpga DE0 NANO SOC. redbear 2608d 09h /
21 Vpi data rx. redbear 2629d 08h /
20 SystemC minor correction. redbear 2629d 08h /
19 RX and TX correct. redbear 2629d 08h /
18 FSM minor correction redbear 2636d 08h /
17 TX correction FCT reaceive and TX data transfer. redbear 2636d 08h /
16 Adding TX_WRITE to go down after detect first edge posedge tx_ready. redbear 2636d 08h /
15 Tx with FCT with partial correction. redbear 2664d 09h /
14 New version of Receiver. redbear 2664d 09h /
13 upating files. redbear 2691d 09h /
12 update files and SystemC. redbear 2713d 09h /
11 Adding shared object. redbear 2723d 10h /
10 Update tx verilog rx systemc test. redbear 2723d 10h /
9 Update shared object and Graphical interface. redbear 2723d 10h /
8 EOPDATA is functional. redbear 2723d 10h /
7 Updating testbench file using correcting signals VPI. redbear 2728d 11h /
6 Updating FCT and NCHAR counters on TX. redbear 2728d 12h /
5 Adding first verilog with new struct dir. redbear 2740d 10h /
4 Deleting all redbear 2740d 10h /
3 Adding a tutorial about the use of SpaceWire Test Suit. redbear 2905d 15h /
2 initial work with spacewire redbear 2914d 00h /
1 The project and the structure was created root 2914d 14h /

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