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Rev Log message Author Age Path
26 Added backpressure drop module ghutchis 4825d 23h /
25 Added sd_sync component for cross-clock synchronization ghutchis 4931d 21h /
24 Added CRC32 checker to environment & RTL ghutchis 5048d 22h /
23 Imported Ethernet Tri-Mode MAC for use in examples ghutchis 5218d 20h /
22 Created separate module-level environments for fifo_b
and scoreboard. Added some documentation on the
example bridge, including a PDF preso giving a basic
introduction to ethernet.		 ghutchis 5245d 01h /
21 Changed rrslow to rrmux, updated descriptions, changed
bridge mux to fast arb		 ghutchis 5246d 03h /
20 Added fast arb mode ghutchis 5246d 05h /
19 Fixed several minor bugs in scoreboard, adjusted usage width in sd_fifo_b,
and updated component documentation.		 ghutchis 5246d 17h /
18 Added scoreboard and scoreboard testbench ghutchis 5246d 21h /
17 Added component descriptions ghutchis 5247d 06h /
16 Changed fifo head/tail to have separate usage counters for producer and consumer
side.

Fixed bug in port_ring_tap where it jumped to non-existent state.

Changed default dump mode for icarus to lxt.		 ghutchis 5247d 18h /
15 Fixed FIB lookup multicast -- multicast packets were being
repeatedly sent from lookup		 ghutchis 5247d 22h /
14 - Modified large FIFO to remove "full" signal and store only N-1 words
- changed small FIFO to use memory instance instead of registers
- changed sequence generator to enable more complex tests
- changed sd_mirror to use combinatorial assign output		 ghutchis 5249d 16h /
13 Fixed FIFO Full condition for large fifo, added separate
tests to example bridge		 ghutchis 5253d 02h /
12 Added absolute priority arbitration to ring to avoid
having two ring taps transmit at same time		 ghutchis 5254d 02h /
11 Updated bridge example to fix a number of small bugs.
First packet now exits bridge from all ports.		 ghutchis 5255d 01h /
10 Fixed "locked" variable in rrslow ghutchis 5255d 05h /
9 Added rx_gigmac, additional debug work on concentrator & fib ghutchis 5255d 05h /
8 Added compiling version of bridge example ghutchis 5256d 17h /
7 Added rrslow ghutchis 5258d 21h /
6 Modified "B" output buffer for full-rate operation ghutchis 5261d 06h /
5 Added new component for port ring ghutchis 5261d 22h /
4 Added example directory with basic bridge ghutchis 5262d 16h /
3 Added small/synchronizer FIFO, along with minimal testbench ghutchis 5263d 15h /
2 Initial commit of directory structure and basic components ghutchis 5268d 01h /
1 The project and the structure was created root 5275d 17h /

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