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Rev Log message Author Age Path
47 changed prefix from ~| to ! (same thing) samg 8231d 06h /
46 vcd dumpvar captures all levels samg 8233d 17h /
45 Fixed bug in 16 bit data swap instruction.
The instructions were making the regf status module look at reg 0
even though reg 0 didn't have anything to do with the purpose of
the instruction. Made reg b addr field mirror reg a field.
This error caused unecessary stalls.
Performance increase caused by calling instruction correctly and
not causing stalls from mal-formed instructions.		 samg 8233d 17h /
44 - Removed #1 delay (was originally put in for debug)
- Stall signal forced low during pipeline flush.
(No effect on functionality but it is easier to look at
the waveforms during debug)		 samg 8233d 17h /
43 integrated common rams into processor samg 8257d 11h /
42 minor header correction samg 8257d 11h /
41 common rams samg 8257d 11h /
40 added header and parameter restructure samg 8257d 12h /
39 added header and restructured parameters samg 8257d 12h /
38 minor header fix samg 8257d 12h /
37 added header and modified parameter structure samg 8257d 12h /
36 integrated common memories samg 8257d 12h /
35 integrated standard memories and added header samg 8257d 12h /
34 Used common header samg 8259d 16h /
33 SXP Documentation samg 8264d 21h /
32 timer controller for processor samg 8268d 06h /
31 testbench for timer controller samg 8268d 06h /
30 testbench for reg file samg 8268d 11h /
29 test code assembly samg 8268d 11h /
28 top level simulation file samg 8268d 11h /
27 run script samg 8268d 11h /
26 reg file c++ model samg 8268d 11h /
25 sxp processor class behavioral model samg 8268d 13h /
24 testbench for int_cont samg 8268d 19h /
23 alu c++ model samg 8269d 08h /
22 testbench for dpmem samg 8269d 09h /
21 array range fix samg 8269d 09h /
20 ext c++ model samg 8269d 11h /
19 memory c++ model samg 8269d 12h /
18 fetch c++ model samg 8269d 12h /

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