URL https://opencores.org/ocsvn/t80/t80/trunk

Subversion Repositories t80

[/] - Rev 32

Rev	Log message	Author	Age	Path
32	Fixed for ISE 5.1	jesus	7927d 07h	/
31	Fixed generic name error	jesus	7930d 09h	/
30	Changed to xilinx specific RAM	jesus	7936d 09h	/
29	Fixed (IX/IY+d) timing and added all GB op-codes	jesus	7936d 09h	/
28	Adapted for zxgate	jesus	7937d 09h	/
27	Xilinx SSRAM, initial release	jesus	7937d 09h	/
26	Fixed instruction timing for POP and DJNZ	jesus	7951d 01h	/
25	IX/IY timing and ADC/SBC fix	jesus	7952d 11h	/
24	no message	jesus	7958d 08h	/
23	Fixed T2Write	jesus	7958d 08h	/
22	Added 8080 top level	jesus	7958d 08h	/
21	no message	jesus	7963d 07h	/
20	Updated for new T80s generic	jesus	7963d 07h	/
19	Initial version	jesus	7963d 07h	/
18	Added T2Write generic	jesus	7963d 14h	/
17	Removed write through	jesus	7965d 06h	/
16	no message	jesus	7965d 10h	/
15	Added clock enable and fixed IM 2	jesus	7972d 09h	/
14	Changed to Xilinx ROM	jesus	7991d 21h	/
13	Initial import	jesus	7991d 21h	/
12	Initial import	jesus	7991d 22h	/
11	Added support for XST	jesus	7991d 22h	/
10	Added dummy files	jesus	7991d 23h	/
9	Initial import	jesus	7993d 09h	/
8	Fixed refresh address and DJNZ instruction	jesus	7993d 10h	/
7	Initial import	jesus	7993d 10h	/
6	Fixed wide rom .ucf generation	jesus	8070d 10h	/
5	Now it seems to work	jesus	8070d 10h	/
4	Fixed xilinx ROM generation	jesus	8071d 14h	/
3	Initial commit, incomplete	jesus	8073d 16h	/