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Rev Log message Author Age Path
35 Release 0242 jesus 7896d 05h /
34 Updated for ISE 5.1 jesus 7896d 10h /
33 Fixed typo jesus 7906d 02h /
32 Fixed for ISE 5.1 jesus 7906d 02h /
31 Fixed generic name error jesus 7909d 04h /
30 Changed to xilinx specific RAM jesus 7915d 04h /
29 Fixed (IX/IY+d) timing and added all GB op-codes jesus 7915d 04h /
28 Adapted for zxgate jesus 7916d 04h /
27 Xilinx SSRAM, initial release jesus 7916d 04h /
26 Fixed instruction timing for POP and DJNZ jesus 7929d 20h /
25 IX/IY timing and ADC/SBC fix jesus 7931d 06h /
24 no message jesus 7937d 02h /
23 Fixed T2Write jesus 7937d 02h /
22 Added 8080 top level jesus 7937d 02h /
21 no message jesus 7942d 01h /
20 Updated for new T80s generic jesus 7942d 02h /
19 Initial version jesus 7942d 02h /
18 Added T2Write generic jesus 7942d 08h /
17 Removed write through jesus 7944d 01h /
16 no message jesus 7944d 04h /
15 Added clock enable and fixed IM 2 jesus 7951d 04h /
14 Changed to Xilinx ROM jesus 7970d 15h /
13 Initial import jesus 7970d 16h /
12 Initial import jesus 7970d 16h /
11 Added support for XST jesus 7970d 16h /
10 Added dummy files jesus 7970d 17h /
9 Initial import jesus 7972d 03h /
8 Fixed refresh address and DJNZ instruction jesus 7972d 04h /
7 Initial import jesus 7972d 05h /
6 Fixed wide rom .ucf generation jesus 8049d 05h /

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