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URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

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Rev Log message Author Age Path
56 updated config file for linux kernel compilation 3.19 ultro 3359d 07h /
55 update with linux 3.19 and initramfs buildroot 2015.02 with dhrystone/whetstone ultro 3359d 07h /
54 update RTL with 32 bit wishbone interface ultro 3359d 07h /
53 new mcs release with 32 bit wishbone interface ultro 3359d 07h /
52 commit v4 mcs ultro 3445d 13h /
51 commit v4.0.gate version ultro 3445d 14h /
50 update README ultro 3466d 10h /
49 update README ultro 3466d 10h /
48 update mcs files ultro 3466d 10h /
47 constraint file update for xilinx ise ultro 3466d 10h /
46 commit deletes ultro 3466d 10h /
45 commit deletes ultro 3466d 10h /
44 update v586 pragmas/options for verilator ultro 3466d 10h /
43 update verilator script ultro 3466d 10h /
42 fix TOP_SYS for verilator ultro 3466d 10h /
41 fix TOP_SYS for verilator ultro 3466d 10h /
40 fix tbench ultro 3466d 10h /
39 add C testbench for verilator ultro 3466d 10h /
38 add verilator script ultro 3466d 10h /
37 update run_gate script to launch simulation ultro 3466d 10h /
36 commit all individual notech models of gates ultro 3466d 10h /
35 add notech dir inside rtl ultro 3466d 10h /
34 update rtl v3.4.gate ultro 3466d 10h /
33 update test bench ultro 3466d 10h /
32 update rom/ram ultro 3466d 10h /
31 update binaries kernel +rootfs ultro 3502d 13h /
30 fix run_sw.scr script ultro 3502d 13h /
29 update mcs with 64 bit aligned fetch new module ultro 3503d 01h /
28 update core_netlist with fetch aligned on 64bit boudaries ultro 3503d 02h /
27 fixed gpio input reg290&291 ultro 3515d 15h /

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