OpenCores
URL https://opencores.org/ocsvn/v586/v586/trunk

Subversion Repositories v586

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Rev Log message Author Age Path
92 added doc ultro 2963d 01h /
91 update netlists cosmetics ultro 2963d 13h /
90 updated cosmetic periph.v ultro 2963d 14h /
89 add 3x rtl files ultro 2963d 15h /
88 remove axi ip standalone ultro 2963d 15h /
87 update rtl for boot.mem ultro 2963d 15h /
86 update tbench ultro 2963d 15h /
85 supress 2 files acu.v and clk_wiz.vhd ultro 2963d 16h /
84 add Xilinx xci ip repo ultro 2963d 16h /
83 cleanup ultro 2963d 17h /
82 delete ucf ultro 2963d 17h /
81 update linux patch instead of config , to generated the kinux kernel ultro 2963d 17h /
80 update TOP_SYS.xdc for sd & gpios ultro 2963d 17h /
79 replaced linux with SD version and root.bon with initramfz.cpio.gz from buildroot 2016.02 with micropython and e2fs utilities ultro 2963d 17h /
78 fix mci ultro 2963d 17h /
77 update mcs files with axi version and buildroot 2016.02 and micropython ultro 2963d 17h /
76 remove useless file ultro 2963d 18h /
75 update for axi version ultro 2963d 18h /
74 update boot for one file 32bits instead of 4x files 8bit/bytewise ultro 2963d 18h /
73 Added the zip file for an AXI version of the IP for Vivado Xilinx tool
You can unzip the file into a directory and add IP to your personal IP repository
ultro 3075d 06h /
72 update ROM boot ultro 3248d 10h /
71 update readmes ultro 3248d 10h /
70 updated netlist ultro 3248d 10h /
69 update constraints , with XDC for vivado ultro 3248d 11h /
68 update version for 11.6 DMIPS / 20700 dhrystones ultro 3248d 11h /
67 binaries updated for 11.6 DMIPS / 20700 Dhrystones ultro 3248d 11h /
66 update mcs files for 17k dhrystones ultro 3277d 00h /
65 netlist wiht 17000 dhrystone ultro 3277d 09h /
64 update mcs with v10.0 ultro 3289d 00h /
63 update netlist without Daddrp ultro 3289d 07h /

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