URL https://opencores.org/ocsvn/xgate/xgate/trunk

Subversion Repositories xgate

[/] - Rev 59

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Rev	Log message	Author	Age	Path
59	Fix bug in entering DEBUG mode from WB bus command	rehayes	5279d 17h	/
58	WISHBONE Bus update.	rehayes	5331d 17h	/
57	Traded 16 data registers for 5 address regester when wait states are enabled.	rehayes	5331d 20h	/
56	Extensive changes to testbench and the Xgate master bus interface and the way the RISC handles wait states.	rehayes	5347d 21h	/
55	Minor change to instruction set details.	rehayes	5347d 21h	/
54	complete rewrite of the bus arbitration module. Moved system test registers to new WISHBONE slave module.	rehayes	5347d 21h	/
53	Extensive changes to fix errors in how wait state are handled by the master bus interface and the RISC control logic. Fix to slave mode WISHBONE ack signal.	rehayes	5347d 21h	/
52	Minor changes to aide waveform debug	rehayes	5347d 21h	/
51	Corrections to ADC and SBC instructions, First pass at documentaion instruction set details	rehayes	5363d 17h	/
50	incremental update to match status bit changes	rehayes	5363d 17h	/
49	First pass with instruction set details	rehayes	5363d 18h	/
48	Update for SBC ana ADC condition code changes	rehayes	5363d 18h	/
47	Fix status bit error in ADC and SBC instruction, fix error in thread startup.	rehayes	5363d 18h	/
46	Update to remove stack registers and add new register text.	rehayes	5395d 16h	/
45	Update to remove stack registers and add new register text.	rehayes	5395d 16h	/
44	Update for single program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5397d 15h	/
43	Update for single program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5397d 15h	/
42	Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5397d 15h	/
41	Update for singel program counter added, WISHBONE Slave bus word addressability and byte selection	rehayes	5398d 17h	/
40	Update for single program counter adder	rehayes	5418d 20h	/
39	delete	rehayes	5426d 21h	/
38	Nov 9 2009 update notes	rehayes	5426d 22h	/
37	RAM model breakout for testbench	rehayes	5426d 22h	/
36	Added bus arbitration for slave bus, but not fully functional yet. Added byte lane selects to task calls.	rehayes	5426d 22h	/
35	Add byte lane select input to all tasks	rehayes	5426d 22h	/
34	minor changes related to wishbone master interface	rehayes	5426d 22h	/
33	Update with some new pin information	rehayes	5426d 22h	/
32	added ram block	rehayes	5426d 22h	/
31	Cleanup for MAX_CHANNEL bus	rehayes	5438d 17h	/
30	Added pins debud_mode_i and secure_mode_i. Cleanup for xgif bus	rehayes	5438d 17h	/

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Subversion Repositories xgate

[/] - Rev 59

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