OpenCores
URL https://opencores.org/ocsvn/zpu/zpu/trunk

Subversion Repositories zpu

[/] - Rev 71

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
71 improved instructions on creating a patch oharboe 5767d 01h /
70 2008-08-25 Salvador Eduardo Tropea <salvador@inti.gov.ar>
* Fix typo in zpu_arch.html w.r.t. ZPU UART/Debug channel
oharboe 5767d 01h /
69 more doc work in progress oharboe 5769d 23h /
68 added uart section oharboe 5770d 05h /
67 more docs merged into the big doc oharboe 5770d 21h /
66 added some notes on speeding up the ZPU oharboe 5770d 21h /
65 merging in some docs to zpu_arch.html oharboe 5770d 21h /
64 wip oharboe 5774d 02h /
63 very early work. oharboe 5774d 06h /
62 * duplicated crt0.s and some other stuff from libgloss into
sw/startup. This makes it easier to tinker w/startup code.
oharboe 5774d 07h /
61 wip oharboe 5774d 11h /
60 wip oharboe 5776d 10h /
59 pdf versions oharboe 5776d 22h /
58 some more docs. oharboe 5776d 22h /
57 a few words about zpu_core.vhd and zpu_core_small.vhd oharboe 5776d 22h /
56 added FreeBSD license. Finally. oharboe 5776d 22h /
55 tips for rolling your own ZPU oharboe 5776d 22h /
54 some ideas. oharboe 5777d 00h /
53 marked unused instruction opcodes as OpCode_NAx oharboe 5777d 08h /
52 deleted reference to ic300 dating back to ZY2000 implementation. oharboe 5780d 05h /
51 2008-08-08 Salvador E. Tropea
* zpu/hdl/zpu4/core/histogram.perl - generate opcode histogram from
HDL simulation output
oharboe 5784d 06h /
50 link to zpu_arch.html oharboe 5784d 06h /
49 added link. oharboe 5784d 06h /
48 add missing defs. oharboe 5785d 05h /
47 added basic docs on emulated instructions. oharboe 5785d 07h /
46 * do not enable interrupts for simzpu_small.do. hello world
does not have an interrupt handler, so this caused a BREAK
instruction to be executed.
oharboe 5828d 12h /
45 * zpu_config.vhd: Fixed startSp calculation (address in bytes not words) oharboe 5834d 23h /
44 Miguel Freitas <mfreitas@gmail.com>
log.txt and trace.txt currently on cvs were produced by interrupt.vhd.
this patch will build example_ghdl with interrupt.vhd by default so
user can compare results. adds a note about what user needs to edit to
simulate helloworld.vhd without interrupts.
oharboe 5835d 00h /
43 take 2 oharboe 5835d 01h /
42 I'm also attaching another patch which removes unisim/roc dependency
(it was used just to pulse the areset) and fixes paths for building
the ghdl examples out of the box. I guess this is the easiest way to
get zpu running on linux with minimum effort.

You should check if the areset change doesn't break modelsim. It feels
much simpler this way and seems to work the same, i might be missing
something.
oharboe 5835d 01h /

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.