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[/] [8051/] [tags/] [rel_1/] - Rev 138

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Rev Log message Author Age Path
138 Change buffering to save one clock per instruction. simont 7758d 02h /8051/tags/rel_1/
137 change to fit xrom. simont 7758d 07h /8051/tags/rel_1/
136 registering outputs. simont 7758d 07h /8051/tags/rel_1/
135 prepared start of receiving if ren is not active. simont 7764d 06h /8051/tags/rel_1/
134 fix bug in case execution of two data dependent instructions. simont 7764d 06h /8051/tags/rel_1/
133 fix bug in substraction. simont 7764d 09h /8051/tags/rel_1/
132 change branch instruction execution (reduse needed clock periods). simont 7768d 00h /8051/tags/rel_1/
131 prepare programs for new timing. simont 7768d 00h /8051/tags/rel_1/
130 prepared programs for new timing. simont 7768d 00h /8051/tags/rel_1/
129 updated... simont 7768d 00h /8051/tags/rel_1/
128 chance idat_ir to 24 bit wide simont 7777d 07h /8051/tags/rel_1/
127 fix bug (cyc_o and stb_o) simont 7777d 07h /8051/tags/rel_1/
126 define OC8051_XILINX_RAMB added simont 7777d 07h /8051/tags/rel_1/
125 update, add prescaler, rclk, tclk. simont 7777d 07h /8051/tags/rel_1/
124 add support for external rom from xilinx ramb4 simont 7777d 07h /8051/tags/rel_1/
123 fiz bug iv pcs operation. simont 7779d 03h /8051/tags/rel_1/
122 deifne OC8051_ROM added simont 7782d 07h /8051/tags/rel_1/
121 Change pc add value from 23'h to 16'h simont 7782d 07h /8051/tags/rel_1/
120 defines for pherypherals added simont 7783d 05h /8051/tags/rel_1/
119 remove signal sbuf_txd [12:11] simont 7783d 08h /8051/tags/rel_1/
118 change wr_sft to 2 bit wire. simont 7784d 01h /8051/tags/rel_1/
117 Register oc8051_sfr dato output, add signal wait_data. simont 7784d 01h /8051/tags/rel_1/
116 change sfr's interface. simont 7786d 02h /8051/tags/rel_1/
115 change uart to meet timing. simont 7786d 04h /8051/tags/rel_1/
114 remove t2mod register simont 7789d 07h /8051/tags/rel_1/
113 signal prsc_ow added. simont 7789d 07h /8051/tags/rel_1/
112 change timers to meet timing specifications (add divider with 12) simont 7789d 07h /8051/tags/rel_1/
111 Remove instruction cache and wb_interface simont 7789d 22h /8051/tags/rel_1/
110 change adr_i and adr_o length. simont 7789d 22h /8051/tags/rel_1/
109 add `include "oc8051_defines.v" simont 7789d 22h /8051/tags/rel_1/

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