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[/] [8051/] [tags/] [rel_19/] [rtl/] - Rev 186

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Rev Log message Author Age Path
186 root 5521d 05h /8051/tags/rel_19/rtl/
185 root 5577d 06h /8051/tags/rel_19/rtl/
183 This commit was manufactured by cvs2svn to create tag 'rel_19'. 7655d 22h /8051/tags/rel_19/rtl/
181 Simulation reports added. simont 7655d 22h /8051/tags/rel_19/rtl/
179 add /* synopsys xx_case */ to case statments. simont 7655d 23h /8051/tags/rel_19/rtl/
178 x replaced with 0. simont 7656d 01h /8051/tags/rel_19/rtl/
177 Fix bug in case of writing and reading from same address. simont 7667d 04h /8051/tags/rel_19/rtl/
175 initial inport. simont 7667d 06h /8051/tags/rel_19/rtl/
174 ram modules added. simont 7667d 06h /8051/tags/rel_19/rtl/
173 simualtion `ifdef added simont 7667d 06h /8051/tags/rel_19/rtl/
172 BIST signals added. simont 7670d 06h /8051/tags/rel_19/rtl/
171 fix bug in DA operation. simont 7678d 03h /8051/tags/rel_19/rtl/
158 fix bug. simont 7682d 09h /8051/tags/rel_19/rtl/
153 `ifdef added. simont 7684d 03h /8051/tags/rel_19/rtl/
152 sub_result output added. simont 7684d 03h /8051/tags/rel_19/rtl/
151 remove pc_r register. simont 7684d 03h /8051/tags/rel_19/rtl/
150 fix some bugs. simont 7684d 03h /8051/tags/rel_19/rtl/
149 pipelined acces to axternal instruction interface added. simont 7684d 03h /8051/tags/rel_19/rtl/
148 include "8051_defines" added. simont 7684d 03h /8051/tags/rel_19/rtl/
146 fix bug in movc intruction. simont 7706d 03h /8051/tags/rel_19/rtl/
145 fix bug in case of sequence of inc dptr instrucitons. simont 7711d 07h /8051/tags/rel_19/rtl/
144 chsnge comp.des to des1 simont 7711d 07h /8051/tags/rel_19/rtl/
143 add wire sub_result, conect it to des_acc and des1. simont 7711d 07h /8051/tags/rel_19/rtl/
142 optimize state machine. simont 7712d 09h /8051/tags/rel_19/rtl/
141 remove define OC8051_AS2_PCL, chane signal src_sel2 to 2 bit wide. simont 7712d 10h /8051/tags/rel_19/rtl/
140 cahnge assigment to pc_wait (remove istb_o) simont 7712d 10h /8051/tags/rel_19/rtl/
139 add aditional alu destination to solve critical path. simont 7713d 04h /8051/tags/rel_19/rtl/
138 Change buffering to save one clock per instruction. simont 7713d 04h /8051/tags/rel_19/rtl/
137 change to fit xrom. simont 7713d 09h /8051/tags/rel_19/rtl/
136 registering outputs. simont 7713d 09h /8051/tags/rel_19/rtl/

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