OpenCores
URL https://opencores.org/ocsvn/8051/8051/trunk

Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] - Rev 63

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Rev Log message Author Age Path
63 initial import simont 7963d 01h /8051/tags/rel_2/
62 fix bugs in instruction interface simont 7963d 01h /8051/tags/rel_2/
61 fix bug simont 7964d 04h /8051/tags/rel_2/
60 initial inport simont 7965d 04h /8051/tags/rel_2/
59 add external rom simont 7968d 23h /8051/tags/rel_2/
58 add external rom testing simont 7968d 23h /8051/tags/rel_2/
57 add module oc8051_xrom simont 7968d 23h /8051/tags/rel_2/
56 initial CVS input simont 7968d 23h /8051/tags/rel_2/
55 added parameter DELAY simont 7968d 23h /8051/tags/rel_2/
54 cahnge interface to instruction rom simont 7968d 23h /8051/tags/rel_2/
53 initial CVS inport simont 7968d 23h /8051/tags/rel_2/
52 fix bugs simont 7969d 00h /8051/tags/rel_2/
51 fix bugs simont 7971d 04h /8051/tags/rel_2/
50 fix bugs simont 7971d 05h /8051/tags/rel_2/
49 verification added simont 7978d 05h /8051/tags/rel_2/
48 added program for rom converting simont 7986d 00h /8051/tags/rel_2/
47 remove unused files simont 7986d 01h /8051/tags/rel_2/
46 prepared header simont 7986d 01h /8051/tags/rel_2/
45 prepared header simont 7986d 01h /8051/tags/rel_2/
44 prepared header simont 7986d 01h /8051/tags/rel_2/
43 remove unused files simont 7986d 02h /8051/tags/rel_2/
42 *** empty log message *** simont 7986d 03h /8051/tags/rel_2/
41 remove unused files simont 7986d 03h /8051/tags/rel_2/
40 added sigals for interacting with external ram simont 8006d 05h /8051/tags/rel_2/
39 added signals ack, stb and cyc simont 8013d 03h /8051/tags/rel_2/
38 fix some bugs simont 8013d 03h /8051/tags/rel_2/
37 added signals ack, stb and cyc simont 8013d 03h /8051/tags/rel_2/
36 fix bugs in mode 0 simont 8013d 03h /8051/tags/rel_2/
35 design docunemt simont 8014d 01h /8051/tags/rel_2/
34 specification docunemt simont 8014d 01h /8051/tags/rel_2/

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