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Subversion Repositories 8051

[/] [8051/] [tags/] [rel_2/] - Rev 78

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Rev Log message Author Age Path
78 alu with registered outputs simont 7975d 17h /8051/tags/rel_2/
77 substitute modules oc8051_ram_wr_sel and oc8051ram_rd_sel with oc8051_ram_addr_sel simont 7984d 13h /8051/tags/rel_2/
76 add module oc8051_sfr, 256 bytes internal ram simont 7984d 13h /8051/tags/rel_2/
75 initial import simont 7984d 13h /8051/tags/rel_2/
74 add module oc8051_wb_iinterface simont 7992d 14h /8051/tags/rel_2/
73 initial import simont 7992d 14h /8051/tags/rel_2/
72 fix bug in interface to external data ram simont 7992d 16h /8051/tags/rel_2/
71 add cache simont 7996d 16h /8051/tags/rel_2/
70 initial import simont 7996d 16h /8051/tags/rel_2/
69 add parameters simont 7996d 17h /8051/tags/rel_2/
68 add instruction cache and DELAY parameters for external ram, rom simont 7996d 17h /8051/tags/rel_2/
67 add parameters for instruction cache simont 7996d 17h /8051/tags/rel_2/
66 added xrom_test simont 7997d 14h /8051/tags/rel_2/
65 add oc8051_icache and oc8051_cache_ram simont 7997d 14h /8051/tags/rel_2/
64 signal es_int=1'b0 simont 7997d 14h /8051/tags/rel_2/
63 initial import simont 7997d 14h /8051/tags/rel_2/
62 fix bugs in instruction interface simont 7997d 14h /8051/tags/rel_2/
61 fix bug simont 7998d 16h /8051/tags/rel_2/
60 initial inport simont 7999d 17h /8051/tags/rel_2/
59 add external rom simont 8003d 12h /8051/tags/rel_2/
58 add external rom testing simont 8003d 12h /8051/tags/rel_2/
57 add module oc8051_xrom simont 8003d 12h /8051/tags/rel_2/
56 initial CVS input simont 8003d 12h /8051/tags/rel_2/
55 added parameter DELAY simont 8003d 12h /8051/tags/rel_2/
54 cahnge interface to instruction rom simont 8003d 12h /8051/tags/rel_2/
53 initial CVS inport simont 8003d 12h /8051/tags/rel_2/
52 fix bugs simont 8003d 12h /8051/tags/rel_2/
51 fix bugs simont 8005d 17h /8051/tags/rel_2/
50 fix bugs simont 8005d 18h /8051/tags/rel_2/
49 verification added simont 8012d 17h /8051/tags/rel_2/

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