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[/] [aemb/] [branches/] [AEMB2_712/] - Rev 56

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Rev Log message Author Age Path
56 Parameterised optional components into aeMB_xecu.v sybreon 6086d 01h /aemb/branches/AEMB2_712/
55 Upgraded license to LGPLv3.
Significant performance optimisations.		 sybreon 6086d 09h /aemb/branches/AEMB2_712/
54 Added some compilation optimisations. sybreon 6087d 05h /aemb/branches/AEMB2_712/
53 Added GET/PUT support through a FSL bus. sybreon 6087d 05h /aemb/branches/AEMB2_712/
52 Added log output to iverilog.log sybreon 6087d 05h /aemb/branches/AEMB2_712/
51 Fixed data WISHBONE arbitration problem (reported by J Lee). sybreon 6088d 08h /aemb/branches/AEMB2_712/
50 Parameterised optional components. sybreon 6088d 11h /aemb/branches/AEMB2_712/
49 Added random seed for simulation. sybreon 6091d 14h /aemb/branches/AEMB2_712/
48 Fixed spurious interrupt latching during long bus cycles (spotted by J Lee). sybreon 6092d 20h /aemb/branches/AEMB2_712/
47 Added -msoft-float and -mxl-soft-div compiler flags. sybreon 6092d 20h /aemb/branches/AEMB2_712/
46 Minor code cleanup. sybreon 6093d 17h /aemb/branches/AEMB2_712/
45 Minor code cleanup. sybreon 6093d 17h /aemb/branches/AEMB2_712/
44 Added better (beta) interrupt support.
Changed MSR_IE to disabled at reset as per MB docs.		 sybreon 6094d 06h /aemb/branches/AEMB2_712/
43 Added interrupt simulation.
Changed "human readable" simulation output.		 sybreon 6094d 06h /aemb/branches/AEMB2_712/
42 Enable MSR_IE with software. sybreon 6094d 07h /aemb/branches/AEMB2_712/
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6094d 22h /aemb/branches/AEMB2_712/
40 Recommended to compile code with -O2/3/s sybreon 6105d 06h /aemb/branches/AEMB2_712/
39 Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus. sybreon 6105d 06h /aemb/branches/AEMB2_712/
38 Added interrupt support. sybreon 6250d 07h /aemb/branches/AEMB2_712/
36 Removed asynchronous reset signal. sybreon 6263d 16h /aemb/branches/AEMB2_712/
35 Added async BRA/DLY signals for future clock, reset, and interrupt features. sybreon 6264d 13h /aemb/branches/AEMB2_712/
34 Corrected speed issues after rev 1.9 update. sybreon 6265d 03h /aemb/branches/AEMB2_712/
33 Fixed minor data hazard bug spotted by Matt Ettus. sybreon 6280d 09h /aemb/branches/AEMB2_712/
32 Modified compilation sequence. sybreon 6280d 09h /aemb/branches/AEMB2_712/
31 Removed byte acrobatics. sybreon 6280d 09h /aemb/branches/AEMB2_712/
30 Minor updates as sw/c/aeMB_testbench.c got updated. sybreon 6283d 10h /aemb/branches/AEMB2_712/
29 Added code documentation.
Added new tests that test floating point, modulo arithmetic and multiplication/division.		 sybreon 6283d 10h /aemb/branches/AEMB2_712/
28 Fixed simulation bug. sybreon 6283d 10h /aemb/branches/AEMB2_712/
27 Removed some unnecessary bubble control. sybreon 6283d 21h /aemb/branches/AEMB2_712/
26 Fixed minor synthesis bug. sybreon 6283d 21h /aemb/branches/AEMB2_712/

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