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[/] [aemb/] [branches/] [DEV_SYBREON/] - Rev 195

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Rev Log message Author Age Path
191 New directory structure. root 5585d 01h /aemb/branches/DEV_SYBREON/
115 This commit was manufactured by cvs2svn to create branch 'DEV_SYBREON'. 5917d 04h /branches/DEV_SYBREON/
114 changed MSR bits sybreon 5917d 04h /trunk/
113 initial checkin sybreon 5917d 05h /trunk/
112 *** empty log message *** sybreon 5917d 05h /trunk/
111 added static assert hack sybreon 5917d 05h /trunk/
110 added cache controls sybreon 5917d 08h /trunk/
109 added interrupt controls (may need to be factorised out) sybreon 5917d 08h /trunk/
108 changed semaphore case sybreon 5917d 09h /trunk/
107 Added new C++ files sybreon 5919d 00h /trunk/
106 Made code work with newlib's malloc(); sybreon 5988d 01h /trunk/
105 Patch interrupt bug. sybreon 5998d 19h /trunk/
104 Uses multiplier + barrel shifter as default. sybreon 6000d 03h /trunk/
103 Patched problem where memory access followed by dual cycle instructions were not stalling correctly (submitted by M. Ettus) sybreon 6000d 04h /trunk/
102 Fix MTS during interrupt vectoring bug (reported by M. Ettus). sybreon 6000d 04h /trunk/
101 Made multiplier pause with pipeline sybreon 6010d 01h /trunk/
100 multiplier issues sybreon 6010d 01h /trunk/
99 Minor cleanup sybreon 6021d 20h /trunk/
98 Minor typo sybreon 6021d 22h /trunk/
97 Added malloc() test sybreon 6021d 22h /trunk/
96 Stalls pipeline on MUL/BSF instructions results in minor speed improvements. sybreon 6024d 22h /trunk/
95 Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models. sybreon 6026d 23h /trunk/
94 Prevent fHZD & rBRA[1] sybreon 6028d 21h /trunk/
93 Minor enable fix sybreon 6028d 22h /trunk/
92 Partitioned simulation model. sybreon 6032d 01h /trunk/
91 Made idle thread PC track main PC. sybreon 6033d 07h /trunk/
90 Fixed Carry bit bug. sybreon 6033d 07h /trunk/
89 Changed simulation kernel. sybreon 6033d 07h /trunk/
88 Minor optimisations. sybreon 6034d 00h /trunk/
87 Made T0 loop. sybreon 6034d 17h /trunk/

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