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[/] [aemb/] [trunk/] [sim/] - Rev 203

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Rev Log message Author Age Path
191 New directory structure. root 5602d 15h /aemb/trunk/sim/
164 added random seed sybreon 5885d 20h /trunk/sim/
163 updated to new iversim compatibility sybreon 5885d 20h /trunk/sim/
162 Modified script to use verilog pre-processing.
Changed /bin/bash to /bin/sh as suggested by "Wojciech A. Koszek" <wkoszek@freebsd.org> for FreeBSD compatibility.		 sybreon 5888d 15h /trunk/sim/
157 Added interrupt capability. sybreon 5915d 01h /trunk/sim/
156 initial import sybreon 5915d 02h /trunk/sim/
155 Minor cosmetic changes. sybreon 5915d 02h /trunk/sim/
144 Added VCD2LXT functions. sybreon 5918d 18h /trunk/sim/
143 Fixed minor typos. sybreon 5918d 18h /trunk/sim/
138 initial import sybreon 5919d 16h /trunk/sim/
98 Minor typo sybreon 6039d 12h /trunk/sim/
95 Abstracted simulation kernel (aeMB_sim) to split simulation models from synthesis models. sybreon 6044d 13h /trunk/sim/
92 Partitioned simulation model. sybreon 6049d 15h /trunk/sim/
79 Modified for AEMB2 sybreon 6057d 09h /trunk/sim/
73 Moved simulation kernel into code. sybreon 6067d 17h /trunk/sim/
71 Old version deprecated. sybreon 6074d 20h /trunk/sim/
69 Removed unnecessary byte acrobatics with VMEM data. sybreon 6077d 16h /trunk/sim/
67 Minor simulation fixes. sybreon 6079d 14h /trunk/sim/
59 Added posedge/negedge bus interface.
Modified interrupt test system.		 sybreon 6083d 12h /trunk/sim/
58 Updated simulation to also check BRI 0x00 instruction. sybreon 6084d 10h /trunk/sim/
53 Added GET/PUT support through a FSL bus. sybreon 6088d 13h /trunk/sim/
52 Added log output to iverilog.log sybreon 6088d 13h /trunk/sim/
50 Parameterised optional components. sybreon 6089d 20h /trunk/sim/
49 Added random seed for simulation. sybreon 6092d 23h /trunk/sim/
43 Added interrupt simulation.
Changed "human readable" simulation output.		 sybreon 6095d 15h /trunk/sim/
41 New EDK 3.2 compatible design with optional barrel-shifter and multiplier.
Fixed various minor data hazard bugs.
Code compatible with -O0/1/2/3/s generated code.		 sybreon 6096d 07h /trunk/sim/
39 Made some changes to the interrupt control. In some cases, the interrupt logic waits forever and doesn't execute. Bug was discovered by M. Ettus. sybreon 6106d 15h /trunk/sim/
38 Added interrupt support. sybreon 6251d 15h /trunk/sim/
31 Removed byte acrobatics. sybreon 6281d 18h /trunk/sim/
30 Minor updates as sw/c/aeMB_testbench.c got updated. sybreon 6284d 19h /trunk/sim/

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