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[/] [apbi2c/] - Rev 24

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Rev Log message Author Age Path
24 Correcetd modules and back again toold plan on fifo using only registers. redbear 3672d 06h /apbi2c/
23 correcting TX FSM redbear 3686d 12h /apbi2c/
22 Correcting TX transmission and remove tri state from RTL. redbear 3687d 07h /apbi2c/
21 added tri state on module i2c redbear 3700d 10h /apbi2c/
20 Finished a previous version from RX and added SDA and SCL enable to PADS. redbear 3701d 05h /apbi2c/
19 changes about area use for proprely use. redbear 3746d 04h /apbi2c/
18 Corrected fifo mem acess, i2c_module and revised conections on top redbear 3763d 05h /apbi2c/
17 fifo.v and dual_port_ram.v celaya.dario 3764d 05h /apbi2c/
16 fifo.v and dual_port_ram.v celaya.dario 3764d 05h /apbi2c/
15 11'd1 to 4'd1 redbear 3770d 11h /apbi2c/
14 added a and to make real full fifo. redbear 3770d 12h /apbi2c/
13 re write all fifo module to write and give full when the same is not full redbear 3770d 12h /apbi2c/
12 added PSELx on WR_ENA, RD_ENA to correct read/write when PSEL is HIGH redbear 3770d 12h /apbi2c/
11 Added configuration to define RX and TX operation and configure propely the ports. redbear 3777d 08h /apbi2c/
10 Correcting a few words wrote wrong. redbear 3777d 08h /apbi2c/
9 More description added on spec redbear 3778d 09h /apbi2c/
8 More description added on spec redbear 3778d 10h /apbi2c/
7 Corrected CLOCK generated by SCL according NXP spec. redbear 3779d 10h /apbi2c/
6 Adding a basic FSM to RX. redbear 3784d 11h /apbi2c/
5 Added about APB address necessary to read and write on FIFOS and register configuration. redbear 3792d 08h /apbi2c/
4 Added on module I2C basic error for register configuration redbear 3792d 10h /apbi2c/
3 Added a basic example on I2C Block. redbear 3792d 10h /apbi2c/
2 Adding files and initial version. redbear 3793d 06h /apbi2c/
1 The project and the structure was created root 3796d 06h /apbi2c/

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