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[/] [async_sdm_noc/] [branches/] [clos_opt/] [common/] - Rev 76

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Rev Log message Author Age Path
76 fix syntex wsong0210 4714d 00h /async_sdm_noc/branches/clos_opt/common/
70 clos-opt ongoing wsong0210 4724d 00h /async_sdm_noc/branches/clos_opt/common/
68 rewite the clos switch in the SDM-Clos-buf router wsong0210 4728d 00h /async_sdm_noc/branches/clos_opt/common/
67 structure not good, prepare to use new files wsong0210 4728d 01h /async_sdm_noc/branches/clos_opt/common/
66 clos opt ongoing wsong0210 4742d 18h /async_sdm_noc/branches/clos_opt/common/
65 pipeline controller wsong0210 4742d 19h /async_sdm_noc/branches/clos_opt/common/
64 clos opt ongoing wsong0210 4742d 19h /async_sdm_noc/branches/clos_opt/common/
63 clos opt ongoing wsong0210 4742d 23h /async_sdm_noc/branches/clos_opt/common/
62 clos opt ongoing wsong0210 4744d 00h /async_sdm_noc/branches/clos_opt/common/
61 settle down the pipeline controller wsong0210 4748d 23h /async_sdm_noc/branches/clos_opt/common/
60 try to make the address comparison relaxed QDI wsong0210 4752d 00h /async_sdm_noc/branches/clos_opt/common/
59 address deduction wsong0210 4753d 23h /async_sdm_noc/branches/clos_opt/common/
58 opt ongoing 10/06/2011 wsong0210 4755d 00h /async_sdm_noc/branches/clos_opt/common/
57 insert buffers inside clos wsong0210 4755d 03h /async_sdm_noc/branches/clos_opt/common/
47 merge the VC router to trunk wsong0210 4757d 02h /async_sdm_noc/trunk/common/
37 SDM/wormhole ready wsong0210 4764d 00h /async_sdm_noc/trunk/common/
28 merge the synthesis scripts in the branch init to trunk wsong0210 4769d 00h /async_sdm_noc/trunk/common/
22 roll back wsong0210 4770d 19h /async_sdm_noc/trunk/common/
18 allocators_modify wsong0210 4772d 00h /async_sdm_noc/branches/common/
17 allocators wsong0210 4772d 00h /async_sdm_noc/branches/common/
14 output buffers wsong0210 4773d 00h /async_sdm_noc/branches/common/
12 crossbars wsong0210 4773d 00h /async_sdm_noc/branches/common/
11 arbiters wsong0210 4773d 02h /async_sdm_noc/branches/common/
10 script for async cell lib disable timing arc wsong0210 4775d 03h /async_sdm_noc/branches/common/
9 cell library setting up script wsong0210 4775d 17h /async_sdm_noc/branches/common/
8 update the async cell lib wsong0210 4775d 18h /async_sdm_noc/branches/common/
6 the asynchronous cell library wsong0210 4775d 19h /async_sdm_noc/branches/common/
5 modify the file dir for multiple designs wsong0210 4775d 19h /async_sdm_noc/branches/common/

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