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[/] [can/] [tags/] [asyst_2/] [rtl/] - Rev 163

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Rev Log message Author Age Path
161 New directory structure. root 5622d 23h /can/tags/asyst_2/rtl/
131 This commit was manufactured by cvs2svn to create tag 'asyst_2'. 7593d 13h /can/tags/asyst_2/rtl/
130 mbist signals updated according to newest convention markom 7593d 13h /can/tags/asyst_2/rtl/
129 Error counters changed. mohor 7609d 22h /can/tags/asyst_2/rtl/
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.		 mohor 7610d 18h /can/tags/asyst_2/rtl/
125 Synchronization changed, error counters fixed. mohor 7615d 00h /can/tags/asyst_2/rtl/
124 ALTERA_RAM supported. mohor 7635d 06h /can/tags/asyst_2/rtl/
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7642d 12h /can/tags/asyst_2/rtl/
118 Artisan RAM fixed (when not using BIST). mohor 7651d 09h /can/tags/asyst_2/rtl/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7651d 09h /can/tags/asyst_2/rtl/
115 Artisan ram instances added. simons 7657d 03h /can/tags/asyst_2/rtl/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7684d 04h /can/tags/asyst_2/rtl/
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7686d 04h /can/tags/asyst_2/rtl/
110 Fixed according to the linter. mohor 7686d 04h /can/tags/asyst_2/rtl/
109 Fixed according to the linter. mohor 7686d 05h /can/tags/asyst_2/rtl/
108 Fixed according to the linter. mohor 7686d 05h /can/tags/asyst_2/rtl/
107 Fixed according to the linter. mohor 7686d 06h /can/tags/asyst_2/rtl/
106 Unused signal removed. mohor 7692d 04h /can/tags/asyst_2/rtl/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7692d 17h /can/tags/asyst_2/rtl/
102 Little fixes (to fix warnings). mohor 7695d 08h /can/tags/asyst_2/rtl/
100 Synchronization changed. mohor 7699d 10h /can/tags/asyst_2/rtl/
99 PCI_BIST replaced with CAN_BIST. mohor 7699d 10h /can/tags/asyst_2/rtl/
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7704d 21h /can/tags/asyst_2/rtl/
95 Virtual silicon ram instances added. simons 7704d 22h /can/tags/asyst_2/rtl/
93 synthesis full_case parallel_case fixed. mohor 7710d 09h /can/tags/asyst_2/rtl/
92 clkout is clk/2 after the reset. mohor 7710d 18h /can/tags/asyst_2/rtl/
90 paralel_case and full_case compiler directives added to case statements. mohor 7711d 07h /can/tags/asyst_2/rtl/
88 Previous change removed. When resynchronization occurs we go to seg1
stage. sync stage does not cause another start of seg1 stage.		 mohor 7712d 04h /can/tags/asyst_2/rtl/
87 When hard_sync or resync occure we need to go to seg1 segment. Going to
sync segment is in that case blocked.		 mohor 7712d 05h /can/tags/asyst_2/rtl/
85 Typo fixed. mohor 7713d 20h /can/tags/asyst_2/rtl/

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