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Rev Log message Author Age Path
126 Error counters fixed to be compatible with Bosch VHDL reference model.
Small synchronization changes.		 mohor 7551d 14h /can/trunk/
125 Synchronization changed, error counters fixed. mohor 7555d 20h /can/trunk/
124 ALTERA_RAM supported. mohor 7576d 02h /can/trunk/
121 When detecting bus-free, signal bus_free_cnt_en was cleared to zero
although the last sampled bit was zero instead of one.		 mohor 7583d 08h /can/trunk/
119 Artisan RAMs added. mohor 7592d 05h /can/trunk/
118 Artisan RAM fixed (when not using BIST). mohor 7592d 05h /can/trunk/
117 Tristate signal tx_o is separated to tx_o and tx_oen_o. Both signals need
to be joined together on higher level.		 mohor 7592d 05h /can/trunk/
115 Artisan ram instances added. simons 7597d 23h /can/trunk/
112 Tx and rx length are limited to 8 bytes regardless to the DLC value. tadejm 7625d 00h /can/trunk/
111 Fixed according to the linter.
Case statement for data_out joined.		 mohor 7627d 00h /can/trunk/
110 Fixed according to the linter. mohor 7627d 00h /can/trunk/
109 Fixed according to the linter. mohor 7627d 01h /can/trunk/
108 Fixed according to the linter. mohor 7627d 01h /can/trunk/
107 Fixed according to the linter. mohor 7627d 02h /can/trunk/
106 Unused signal removed. mohor 7632d 23h /can/trunk/
104 Synchronization fixed. In some strange cases it didn't work according to
the VHDL reference model.		 tadejm 7633d 13h /can/trunk/
102 Little fixes (to fix warnings). mohor 7636d 04h /can/trunk/
100 Synchronization changed. mohor 7640d 05h /can/trunk/
99 PCI_BIST replaced with CAN_BIST. mohor 7640d 05h /can/trunk/
97 Overrun fifo implemented with FFs, because it is not possible to create such a memory. simons 7645d 17h /can/trunk/
95 Virtual silicon ram instances added. simons 7645d 18h /can/trunk/
93 synthesis full_case parallel_case fixed. mohor 7651d 05h /can/trunk/
92 clkout is clk/2 after the reset. mohor 7651d 13h /can/trunk/
90 paralel_case and full_case compiler directives added to case statements. mohor 7652d 03h /can/trunk/
88 Previous change removed. When resynchronization occurs we go to seg1
stage. sync stage does not cause another start of seg1 stage.		 mohor 7653d 00h /can/trunk/
87 When hard_sync or resync occure we need to go to seg1 segment. Going to
sync segment is in that case blocked.		 mohor 7653d 01h /can/trunk/
85 Typo fixed. mohor 7654d 16h /can/trunk/
84 clk_cnt reduced from [8:0] to [6:0]. mohor 7655d 23h /can/trunk/
83 cs_can_i is used only when WISHBONE interface is not used. mohor 7656d 00h /can/trunk/
82 Removed few signals. mohor 7656d 00h /can/trunk/

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