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[/] [dbg_interface/] [tags/] [asyst_2/] - Rev 94

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Rev Log message Author Age Path
94 temp version. Resets will be changed in next version. mohor 7513d 00h /dbg_interface/tags/asyst_2/
93 tmp version. mohor 7514d 01h /dbg_interface/tags/asyst_2/
92 temp version. mohor 7517d 05h /dbg_interface/tags/asyst_2/
91 tmp version. mohor 7518d 00h /dbg_interface/tags/asyst_2/
90 tmp version. mohor 7518d 18h /dbg_interface/tags/asyst_2/
89 temp4 version. mohor 7520d 00h /dbg_interface/tags/asyst_2/
88 temp3 version. mohor 7520d 19h /dbg_interface/tags/asyst_2/
87 tmp2 version. mohor 7522d 00h /dbg_interface/tags/asyst_2/
86 Tmp version. mohor 7534d 20h /dbg_interface/tags/asyst_2/
85 New directory structure. New debug interface. mohor 7534d 21h /dbg_interface/tags/asyst_2/
84 Removed files that are not needed any more. mohor 7534d 21h /dbg_interface/tags/asyst_2/
83 Small fix. mohor 7534d 21h /dbg_interface/tags/asyst_2/
82 New directory structure. New version of the debug interface. mohor 7534d 21h /dbg_interface/tags/asyst_2/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7534d 21h /dbg_interface/tags/asyst_2/
80 New version of the debug interface. Not finished, yet. mohor 7534d 22h /dbg_interface/tags/asyst_2/
77 MBIST chain connection fixed. mohor 7595d 18h /dbg_interface/tags/asyst_2/
75 Simulation files. mohor 7595d 20h /dbg_interface/tags/asyst_2/
74 Removed. mohor 7595d 20h /dbg_interface/tags/asyst_2/
73 CRC logic changed. mohor 7595d 20h /dbg_interface/tags/asyst_2/
71 Mbist support added. simons 7598d 03h /dbg_interface/tags/asyst_2/
70 A pdf copy of existing doc document. simons 7605d 04h /dbg_interface/tags/asyst_2/
69 WBCNTL added, multiple CPU support described. simons 7625d 18h /dbg_interface/tags/asyst_2/
67 Lower two address lines must be always zero. simons 7630d 22h /dbg_interface/tags/asyst_2/
65 WB_CNTL register added, some syncronization fixes. simons 7631d 22h /dbg_interface/tags/asyst_2/
63 Three more chains added for cpu debug access. simons 7651d 22h /dbg_interface/tags/asyst_2/
61 Lapsus fixed. simons 7679d 22h /dbg_interface/tags/asyst_2/
59 Reset value for riscsel register set to 1. simons 7679d 23h /dbg_interface/tags/asyst_2/
57 Multiple cpu support added. simons 7680d 00h /dbg_interface/tags/asyst_2/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7946d 20h /dbg_interface/tags/asyst_2/
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7946d 20h /dbg_interface/tags/asyst_2/

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