URL https://opencores.org/ocsvn/dbg_interface/dbg_interface/trunk

Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [asyst_2/] [rtl/] - Rev 119

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Rev	Log message	Author	Age	Path
119	cpu_stall_o activated as soon as bp occurs.	mohor	7456d 15h	/dbg_interface/tags/asyst_2/rtl/
117	Define name changed.	mohor	7458d 11h	/dbg_interface/tags/asyst_2/rtl/
108	Reset values width added because of FV, a good sentence changed because some tools can not handle it.	simons	7459d 17h	/dbg_interface/tags/asyst_2/rtl/
106	Sensitivity list updated.	simons	7460d 16h	/dbg_interface/tags/asyst_2/rtl/
104	cpu_tall_o is set with cpu_stb_o or register.	mohor	7461d 06h	/dbg_interface/tags/asyst_2/rtl/
102	New version.	mohor	7461d 07h	/dbg_interface/tags/asyst_2/rtl/
101	Almost finished.	mohor	7461d 08h	/dbg_interface/tags/asyst_2/rtl/
100	* empty log message *	mohor	7462d 10h	/dbg_interface/tags/asyst_2/rtl/
99	cpu registers added.	mohor	7462d 10h	/dbg_interface/tags/asyst_2/rtl/
97	Working.	mohor	7463d 13h	/dbg_interface/tags/asyst_2/rtl/
95	Temp version.	mohor	7464d 02h	/dbg_interface/tags/asyst_2/rtl/
94	temp version. Resets will be changed in next version.	mohor	7464d 12h	/dbg_interface/tags/asyst_2/rtl/
93	tmp version.	mohor	7465d 13h	/dbg_interface/tags/asyst_2/rtl/
92	temp version.	mohor	7468d 17h	/dbg_interface/tags/asyst_2/rtl/
91	tmp version.	mohor	7469d 12h	/dbg_interface/tags/asyst_2/rtl/
90	tmp version.	mohor	7470d 07h	/dbg_interface/tags/asyst_2/rtl/
89	temp4 version.	mohor	7471d 13h	/dbg_interface/tags/asyst_2/rtl/
88	temp3 version.	mohor	7472d 08h	/dbg_interface/tags/asyst_2/rtl/
87	tmp2 version.	mohor	7473d 13h	/dbg_interface/tags/asyst_2/rtl/
86	Tmp version.	mohor	7486d 09h	/dbg_interface/tags/asyst_2/rtl/
83	Small fix.	mohor	7486d 09h	/dbg_interface/tags/asyst_2/rtl/
82	New directory structure. New version of the debug interface.	mohor	7486d 10h	/dbg_interface/tags/asyst_2/rtl/
81	New directory structure. New version of the debug interface. Files that are not needed removed.	mohor	7486d 10h	/dbg_interface/tags/asyst_2/rtl/
77	MBIST chain connection fixed.	mohor	7547d 07h	/dbg_interface/tags/asyst_2/rtl/
73	CRC logic changed.	mohor	7547d 09h	/dbg_interface/tags/asyst_2/rtl/
71	Mbist support added.	simons	7549d 15h	/dbg_interface/tags/asyst_2/rtl/
67	Lower two address lines must be always zero.	simons	7582d 11h	/dbg_interface/tags/asyst_2/rtl/
65	WB_CNTL register added, some syncronization fixes.	simons	7583d 10h	/dbg_interface/tags/asyst_2/rtl/
63	Three more chains added for cpu debug access.	simons	7603d 11h	/dbg_interface/tags/asyst_2/rtl/
61	Lapsus fixed.	simons	7631d 11h	/dbg_interface/tags/asyst_2/rtl/

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Subversion Repositories dbg_interface

[/] [dbg_interface/] [tags/] [asyst_2/] [rtl/] - Rev 119

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