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[/] [dbg_interface/] [tags/] [asyst_3/] - Rev 92

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Rev Log message Author Age Path
92 temp version. mohor 7513d 21h /dbg_interface/tags/asyst_3/
91 tmp version. mohor 7514d 16h /dbg_interface/tags/asyst_3/
90 tmp version. mohor 7515d 10h /dbg_interface/tags/asyst_3/
89 temp4 version. mohor 7516d 16h /dbg_interface/tags/asyst_3/
88 temp3 version. mohor 7517d 11h /dbg_interface/tags/asyst_3/
87 tmp2 version. mohor 7518d 16h /dbg_interface/tags/asyst_3/
86 Tmp version. mohor 7531d 12h /dbg_interface/tags/asyst_3/
85 New directory structure. New debug interface. mohor 7531d 13h /dbg_interface/tags/asyst_3/
84 Removed files that are not needed any more. mohor 7531d 13h /dbg_interface/tags/asyst_3/
83 Small fix. mohor 7531d 13h /dbg_interface/tags/asyst_3/
82 New directory structure. New version of the debug interface. mohor 7531d 13h /dbg_interface/tags/asyst_3/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7531d 13h /dbg_interface/tags/asyst_3/
80 New version of the debug interface. Not finished, yet. mohor 7531d 14h /dbg_interface/tags/asyst_3/
77 MBIST chain connection fixed. mohor 7592d 10h /dbg_interface/tags/asyst_3/
75 Simulation files. mohor 7592d 12h /dbg_interface/tags/asyst_3/
74 Removed. mohor 7592d 12h /dbg_interface/tags/asyst_3/
73 CRC logic changed. mohor 7592d 12h /dbg_interface/tags/asyst_3/
71 Mbist support added. simons 7594d 19h /dbg_interface/tags/asyst_3/
70 A pdf copy of existing doc document. simons 7601d 20h /dbg_interface/tags/asyst_3/
69 WBCNTL added, multiple CPU support described. simons 7622d 10h /dbg_interface/tags/asyst_3/
67 Lower two address lines must be always zero. simons 7627d 14h /dbg_interface/tags/asyst_3/
65 WB_CNTL register added, some syncronization fixes. simons 7628d 14h /dbg_interface/tags/asyst_3/
63 Three more chains added for cpu debug access. simons 7648d 14h /dbg_interface/tags/asyst_3/
61 Lapsus fixed. simons 7676d 14h /dbg_interface/tags/asyst_3/
59 Reset value for riscsel register set to 1. simons 7676d 15h /dbg_interface/tags/asyst_3/
57 Multiple cpu support added. simons 7676d 16h /dbg_interface/tags/asyst_3/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7943d 12h /dbg_interface/tags/asyst_3/
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7943d 12h /dbg_interface/tags/asyst_3/
53 Trst active high. Inverted on higher layer. mohor 7943d 14h /dbg_interface/tags/asyst_3/
52 Trst signal is not inverted here any more. Inverted on higher layer !!!. mohor 7943d 14h /dbg_interface/tags/asyst_3/

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