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[/] [dbg_interface/] [tags/] [highland_ver1/] - Rev 93

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Rev Log message Author Age Path
93 tmp version. mohor 7485d 20h /dbg_interface/tags/highland_ver1/
92 temp version. mohor 7489d 00h /dbg_interface/tags/highland_ver1/
91 tmp version. mohor 7489d 19h /dbg_interface/tags/highland_ver1/
90 tmp version. mohor 7490d 13h /dbg_interface/tags/highland_ver1/
89 temp4 version. mohor 7491d 19h /dbg_interface/tags/highland_ver1/
88 temp3 version. mohor 7492d 14h /dbg_interface/tags/highland_ver1/
87 tmp2 version. mohor 7493d 19h /dbg_interface/tags/highland_ver1/
86 Tmp version. mohor 7506d 15h /dbg_interface/tags/highland_ver1/
85 New directory structure. New debug interface. mohor 7506d 16h /dbg_interface/tags/highland_ver1/
84 Removed files that are not needed any more. mohor 7506d 16h /dbg_interface/tags/highland_ver1/
83 Small fix. mohor 7506d 16h /dbg_interface/tags/highland_ver1/
82 New directory structure. New version of the debug interface. mohor 7506d 16h /dbg_interface/tags/highland_ver1/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7506d 16h /dbg_interface/tags/highland_ver1/
80 New version of the debug interface. Not finished, yet. mohor 7506d 17h /dbg_interface/tags/highland_ver1/
77 MBIST chain connection fixed. mohor 7567d 13h /dbg_interface/tags/highland_ver1/
75 Simulation files. mohor 7567d 15h /dbg_interface/tags/highland_ver1/
74 Removed. mohor 7567d 15h /dbg_interface/tags/highland_ver1/
73 CRC logic changed. mohor 7567d 15h /dbg_interface/tags/highland_ver1/
71 Mbist support added. simons 7569d 22h /dbg_interface/tags/highland_ver1/
70 A pdf copy of existing doc document. simons 7576d 23h /dbg_interface/tags/highland_ver1/
69 WBCNTL added, multiple CPU support described. simons 7597d 13h /dbg_interface/tags/highland_ver1/
67 Lower two address lines must be always zero. simons 7602d 17h /dbg_interface/tags/highland_ver1/
65 WB_CNTL register added, some syncronization fixes. simons 7603d 17h /dbg_interface/tags/highland_ver1/
63 Three more chains added for cpu debug access. simons 7623d 17h /dbg_interface/tags/highland_ver1/
61 Lapsus fixed. simons 7651d 17h /dbg_interface/tags/highland_ver1/
59 Reset value for riscsel register set to 1. simons 7651d 18h /dbg_interface/tags/highland_ver1/
57 Multiple cpu support added. simons 7651d 19h /dbg_interface/tags/highland_ver1/
56 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7918d 15h /dbg_interface/tags/highland_ver1/
55 Revision 1.6. Trst changed to active high !!!. In order to be compliant with the
standard, reset needs to be negated on the upper layer.		 mohor 7918d 15h /dbg_interface/tags/highland_ver1/
53 Trst active high. Inverted on higher layer. mohor 7918d 17h /dbg_interface/tags/highland_ver1/

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