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[/] [dbg_interface/] [tags/] [highland_ver1/] [bench/] - Rev 158

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Rev Log message Author Age Path
158 root 5580d 02h /dbg_interface/tags/highland_ver1/bench/
133 This commit was manufactured by cvs2svn to create tag 'highland_ver1'. 7402d 05h /dbg_interface/tags/highland_ver1/bench/
128 Defines WISHBONE_SUPPORTED and CPU_SUPPORTED added. By default both are
turned on.		 mohor 7446d 12h /dbg_interface/tags/highland_ver1/bench/
124 Display for VATS added. mohor 7451d 08h /dbg_interface/tags/highland_ver1/bench/
121 Port signals are all set to zero after reset. mohor 7454d 08h /dbg_interface/tags/highland_ver1/bench/
120 test stall_test added. mohor 7454d 11h /dbg_interface/tags/highland_ver1/bench/
117 Define name changed. mohor 7456d 08h /dbg_interface/tags/highland_ver1/bench/
116 Data latching changed when testing WB. mohor 7456d 08h /dbg_interface/tags/highland_ver1/bench/
115 More debug data added. mohor 7456d 12h /dbg_interface/tags/highland_ver1/bench/
114 CRC generation iand verification in bench changed. mohor 7456d 13h /dbg_interface/tags/highland_ver1/bench/
113 IDCODE test improved. mohor 7456d 14h /dbg_interface/tags/highland_ver1/bench/
112 dbg_tb_defines.v not used. mohor 7457d 09h /dbg_interface/tags/highland_ver1/bench/
111 Define tap_defines.v added to test bench. mohor 7457d 09h /dbg_interface/tags/highland_ver1/bench/
110 Waiting for "ready" improved. mohor 7457d 10h /dbg_interface/tags/highland_ver1/bench/
102 New version. mohor 7459d 04h /dbg_interface/tags/highland_ver1/bench/
101 Almost finished. mohor 7459d 05h /dbg_interface/tags/highland_ver1/bench/
99 cpu registers added. mohor 7460d 07h /dbg_interface/tags/highland_ver1/bench/
96 Working. mohor 7461d 11h /dbg_interface/tags/highland_ver1/bench/
95 Temp version. mohor 7461d 23h /dbg_interface/tags/highland_ver1/bench/
93 tmp version. mohor 7463d 11h /dbg_interface/tags/highland_ver1/bench/
92 temp version. mohor 7466d 14h /dbg_interface/tags/highland_ver1/bench/
91 tmp version. mohor 7467d 09h /dbg_interface/tags/highland_ver1/bench/
90 tmp version. mohor 7468d 04h /dbg_interface/tags/highland_ver1/bench/
89 temp4 version. mohor 7469d 10h /dbg_interface/tags/highland_ver1/bench/
88 temp3 version. mohor 7470d 05h /dbg_interface/tags/highland_ver1/bench/
87 tmp2 version. mohor 7471d 10h /dbg_interface/tags/highland_ver1/bench/
80 New version of the debug interface. Not finished, yet. mohor 7484d 08h /dbg_interface/tags/highland_ver1/bench/
75 Simulation files. mohor 7545d 06h /dbg_interface/tags/highland_ver1/bench/
73 CRC logic changed. mohor 7545d 06h /dbg_interface/tags/highland_ver1/bench/
63 Three more chains added for cpu debug access. simons 7601d 08h /dbg_interface/tags/highland_ver1/bench/

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