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[/] [dbg_interface/] [tags/] [rel_16/] [rtl/] - Rev 158

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Rev Log message Author Age Path
158 root 5570d 22h /dbg_interface/tags/rel_16/rtl/
118 This commit was manufactured by cvs2svn to create tag 'rel_16'. 7447d 03h /dbg_interface/tags/rel_16/rtl/
117 Define name changed. mohor 7447d 03h /dbg_interface/tags/rel_16/rtl/
108 Reset values width added because of FV, a good sentence changed because some tools can not handle it. simons 7448d 10h /dbg_interface/tags/rel_16/rtl/
106 Sensitivity list updated. simons 7449d 08h /dbg_interface/tags/rel_16/rtl/
104 cpu_tall_o is set with cpu_stb_o or register. mohor 7449d 23h /dbg_interface/tags/rel_16/rtl/
102 New version. mohor 7450d 00h /dbg_interface/tags/rel_16/rtl/
101 Almost finished. mohor 7450d 01h /dbg_interface/tags/rel_16/rtl/
100 *** empty log message *** mohor 7451d 03h /dbg_interface/tags/rel_16/rtl/
99 cpu registers added. mohor 7451d 03h /dbg_interface/tags/rel_16/rtl/
97 Working. mohor 7452d 06h /dbg_interface/tags/rel_16/rtl/
95 Temp version. mohor 7452d 19h /dbg_interface/tags/rel_16/rtl/
94 temp version. Resets will be changed in next version. mohor 7453d 05h /dbg_interface/tags/rel_16/rtl/
93 tmp version. mohor 7454d 06h /dbg_interface/tags/rel_16/rtl/
92 temp version. mohor 7457d 10h /dbg_interface/tags/rel_16/rtl/
91 tmp version. mohor 7458d 05h /dbg_interface/tags/rel_16/rtl/
90 tmp version. mohor 7459d 00h /dbg_interface/tags/rel_16/rtl/
89 temp4 version. mohor 7460d 06h /dbg_interface/tags/rel_16/rtl/
88 temp3 version. mohor 7461d 01h /dbg_interface/tags/rel_16/rtl/
87 tmp2 version. mohor 7462d 06h /dbg_interface/tags/rel_16/rtl/
86 Tmp version. mohor 7475d 01h /dbg_interface/tags/rel_16/rtl/
83 Small fix. mohor 7475d 02h /dbg_interface/tags/rel_16/rtl/
82 New directory structure. New version of the debug interface. mohor 7475d 03h /dbg_interface/tags/rel_16/rtl/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7475d 03h /dbg_interface/tags/rel_16/rtl/
77 MBIST chain connection fixed. mohor 7536d 00h /dbg_interface/tags/rel_16/rtl/
73 CRC logic changed. mohor 7536d 02h /dbg_interface/tags/rel_16/rtl/
71 Mbist support added. simons 7538d 08h /dbg_interface/tags/rel_16/rtl/
67 Lower two address lines must be always zero. simons 7571d 04h /dbg_interface/tags/rel_16/rtl/
65 WB_CNTL register added, some syncronization fixes. simons 7572d 03h /dbg_interface/tags/rel_16/rtl/
63 Three more chains added for cpu debug access. simons 7592d 04h /dbg_interface/tags/rel_16/rtl/

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