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[/] [dbg_interface/] [tags/] [rel_21/] - Rev 100

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Rev Log message Author Age Path
100 *** empty log message *** mohor 7507d 18h /dbg_interface/tags/rel_21/
99 cpu registers added. mohor 7507d 18h /dbg_interface/tags/rel_21/
97 Working. mohor 7508d 21h /dbg_interface/tags/rel_21/
96 Working. mohor 7508d 22h /dbg_interface/tags/rel_21/
95 Temp version. mohor 7509d 10h /dbg_interface/tags/rel_21/
94 temp version. Resets will be changed in next version. mohor 7509d 20h /dbg_interface/tags/rel_21/
93 tmp version. mohor 7510d 21h /dbg_interface/tags/rel_21/
92 temp version. mohor 7514d 01h /dbg_interface/tags/rel_21/
91 tmp version. mohor 7514d 20h /dbg_interface/tags/rel_21/
90 tmp version. mohor 7515d 15h /dbg_interface/tags/rel_21/
89 temp4 version. mohor 7516d 21h /dbg_interface/tags/rel_21/
88 temp3 version. mohor 7517d 16h /dbg_interface/tags/rel_21/
87 tmp2 version. mohor 7518d 21h /dbg_interface/tags/rel_21/
86 Tmp version. mohor 7531d 17h /dbg_interface/tags/rel_21/
85 New directory structure. New debug interface. mohor 7531d 17h /dbg_interface/tags/rel_21/
84 Removed files that are not needed any more. mohor 7531d 17h /dbg_interface/tags/rel_21/
83 Small fix. mohor 7531d 17h /dbg_interface/tags/rel_21/
82 New directory structure. New version of the debug interface. mohor 7531d 18h /dbg_interface/tags/rel_21/
81 New directory structure. New version of the debug interface.
Files that are not needed removed.		 mohor 7531d 18h /dbg_interface/tags/rel_21/
80 New version of the debug interface. Not finished, yet. mohor 7531d 18h /dbg_interface/tags/rel_21/
77 MBIST chain connection fixed. mohor 7592d 15h /dbg_interface/tags/rel_21/
75 Simulation files. mohor 7592d 16h /dbg_interface/tags/rel_21/
74 Removed. mohor 7592d 16h /dbg_interface/tags/rel_21/
73 CRC logic changed. mohor 7592d 17h /dbg_interface/tags/rel_21/
71 Mbist support added. simons 7594d 23h /dbg_interface/tags/rel_21/
70 A pdf copy of existing doc document. simons 7602d 01h /dbg_interface/tags/rel_21/
69 WBCNTL added, multiple CPU support described. simons 7622d 14h /dbg_interface/tags/rel_21/
67 Lower two address lines must be always zero. simons 7627d 19h /dbg_interface/tags/rel_21/
65 WB_CNTL register added, some syncronization fixes. simons 7628d 18h /dbg_interface/tags/rel_21/
63 Three more chains added for cpu debug access. simons 7648d 19h /dbg_interface/tags/rel_21/

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