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[/] [dbg_interface/] [tags/] [rel_6/] [rtl/] - Rev 41

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Rev Log message Author Age Path
41 Function changed to logic because of some synthesis warnings. mohor 8148d 04h /dbg_interface/tags/rel_6/rtl/
40 Signal tdo_padoe_o changed back to tdo_padoen_o. mohor 8162d 04h /dbg_interface/tags/rel_6/rtl/
39 tdo_padoen_o changed to tdo_padoe_o. Signal was always active high, just
not named correctly.		 mohor 8163d 05h /dbg_interface/tags/rel_6/rtl/
38 Few outputs for boundary scan chain added. mohor 8176d 04h /dbg_interface/tags/rel_6/rtl/
37 tap_top and dbg_top modules are put into two separate modules. tap_top
contains only tap state machine and related logic. dbg_top contains all
logic necessery for debugging.		 mohor 8176d 08h /dbg_interface/tags/rel_6/rtl/
36 Structure changed. Hooks for jtag chain added. mohor 8180d 03h /dbg_interface/tags/rel_6/rtl/
33 LatchedJTAG_IR used when muxing TDO instead of JTAG_IR. mohor 8210d 06h /dbg_interface/tags/rel_6/rtl/
32 Stupid bug that was entered by previous update fixed. mohor 8211d 05h /dbg_interface/tags/rel_6/rtl/
31 trst synchronization is not needed and was removed. mohor 8211d 06h /dbg_interface/tags/rel_6/rtl/
30 IDCODE bug fixed, chains reused to decreas size of core. Data is shifted-in
not filled-in. Tested in hw.		 mohor 8222d 11h /dbg_interface/tags/rel_6/rtl/
28 TDO and TDO Enable signal are separated into two signals. mohor 8258d 07h /dbg_interface/tags/rel_6/rtl/
27 Warnings from synthesys tools fixed. mohor 8272d 08h /dbg_interface/tags/rel_6/rtl/
26 Warnings from synthesys tools fixed. mohor 8272d 09h /dbg_interface/tags/rel_6/rtl/
25 trst signal is synchronized to wb_clk_i. mohor 8273d 05h /dbg_interface/tags/rel_6/rtl/
23 Trace disabled by default. mohor 8280d 09h /dbg_interface/tags/rel_6/rtl/
22 Register length fixed. mohor 8280d 09h /dbg_interface/tags/rel_6/rtl/
21 CRC is returned when chain selection data is transmitted. mohor 8281d 05h /dbg_interface/tags/rel_6/rtl/
20 Crc generation is different for read or write commands. Small synthesys fixes. mohor 8282d 08h /dbg_interface/tags/rel_6/rtl/
19 Wishbone data latched on wb_clk_i instead of risc_clk. mohor 8294d 08h /dbg_interface/tags/rel_6/rtl/
18 Reset signals are not combined any more. mohor 8296d 17h /dbg_interface/tags/rel_6/rtl/
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8320d 07h /dbg_interface/tags/rel_6/rtl/
15 bs_chain_o added. mohor 8322d 08h /dbg_interface/tags/rel_6/rtl/
13 Signal names changed to lowercase. mohor 8323d 08h /dbg_interface/tags/rel_6/rtl/
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8324d 09h /dbg_interface/tags/rel_6/rtl/
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8345d 04h /dbg_interface/tags/rel_6/rtl/
9 Working version. Few bugs fixed, comments added. mohor 8349d 08h /dbg_interface/tags/rel_6/rtl/
8 Asynchronous set/reset not used in trace any more. mohor 8350d 07h /dbg_interface/tags/rel_6/rtl/
5 Trace fixed. Some registers changed, trace simplified. mohor 8351d 04h /dbg_interface/tags/rel_6/rtl/
2 Initial official release. mohor 8356d 05h /dbg_interface/tags/rel_6/rtl/

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