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[/] [dbg_interface/] [trunk/] [bench/] - Rev 113

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Rev Log message Author Age Path
113 IDCODE test improved. mohor 7513d 08h /dbg_interface/trunk/bench/
112 dbg_tb_defines.v not used. mohor 7514d 03h /dbg_interface/trunk/bench/
111 Define tap_defines.v added to test bench. mohor 7514d 03h /dbg_interface/trunk/bench/
110 Waiting for "ready" improved. mohor 7514d 03h /dbg_interface/trunk/bench/
102 New version. mohor 7515d 22h /dbg_interface/trunk/bench/
101 Almost finished. mohor 7515d 23h /dbg_interface/trunk/bench/
99 cpu registers added. mohor 7517d 01h /dbg_interface/trunk/bench/
96 Working. mohor 7518d 05h /dbg_interface/trunk/bench/
95 Temp version. mohor 7518d 17h /dbg_interface/trunk/bench/
93 tmp version. mohor 7520d 04h /dbg_interface/trunk/bench/
92 temp version. mohor 7523d 08h /dbg_interface/trunk/bench/
91 tmp version. mohor 7524d 03h /dbg_interface/trunk/bench/
90 tmp version. mohor 7524d 22h /dbg_interface/trunk/bench/
89 temp4 version. mohor 7526d 04h /dbg_interface/trunk/bench/
88 temp3 version. mohor 7526d 23h /dbg_interface/trunk/bench/
87 tmp2 version. mohor 7528d 04h /dbg_interface/trunk/bench/
80 New version of the debug interface. Not finished, yet. mohor 7541d 02h /dbg_interface/trunk/bench/
75 Simulation files. mohor 7601d 23h /dbg_interface/trunk/bench/
73 CRC logic changed. mohor 7602d 00h /dbg_interface/trunk/bench/
63 Three more chains added for cpu debug access. simons 7658d 02h /dbg_interface/trunk/bench/
47 mon_cntl_o signals that controls monitor mux added. mohor 8136d 01h /dbg_interface/trunk/bench/
38 Few outputs for boundary scan chain added. mohor 8192d 01h /dbg_interface/trunk/bench/
36 Structure changed. Hooks for jtag chain added. mohor 8196d 00h /dbg_interface/trunk/bench/
17 dbg_timescale.v changed to timescale.v This is done for the simulation of
few different cores in a single project.		 mohor 8336d 04h /dbg_interface/trunk/bench/
15 bs_chain_o added. mohor 8338d 05h /dbg_interface/trunk/bench/
13 Signal names changed to lowercase. mohor 8339d 06h /dbg_interface/trunk/bench/
12 Wishbone interface added, few fixes for better performance,
hooks for boundary scan testing added.		 mohor 8340d 06h /dbg_interface/trunk/bench/
11 Changes connected to the OpenRISC access (SPR read, SPR write). mohor 8361d 02h /dbg_interface/trunk/bench/
9 Working version. Few bugs fixed, comments added. mohor 8365d 06h /dbg_interface/trunk/bench/
6 Minor changes for simulation. mohor 8366d 04h /dbg_interface/trunk/bench/

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