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[/] [eco32/] [tags/] [eco32-0.24/] [fpga/] [src/] - Rev 211

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Rev Log message Author Age Path
211 tagging eco32-0.24 hellwig 3569d 21h /eco32/tags/eco32-0.24/fpga/src/
204 changed TLB behavior on tbs instructions hellwig 3577d 14h /eco32/tags/eco32-0.24/fpga/src/
197 IDE interface byte-order problem solved hellwig 3586d 15h /eco32/tags/eco32-0.24/fpga/src/
192 board I/O for XSA board hellwig 3589d 11h /eco32/tags/eco32-0.24/fpga/src/
191 board I/O for XSA board hellwig 3589d 14h /eco32/tags/eco32-0.24/fpga/src/
190 board-specific I/O module added hellwig 3589d 18h /eco32/tags/eco32-0.24/fpga/src/
181 hardware got BadAccess register; synthesizer result eco32.bit now included hellwig 3595d 10h /eco32/tags/eco32-0.24/fpga/src/
129 hardware: clock/reset update hellwig 3749d 18h /eco32/tags/eco32-0.24/fpga/src/
128 hardware: clock/reset update hellwig 3749d 19h /eco32/tags/eco32-0.24/fpga/src/
127 hardware: clock/reset update hellwig 3750d 05h /eco32/tags/eco32-0.24/fpga/src/
126 hardware: ram pin ordering hellwig 3750d 17h /eco32/tags/eco32-0.24/fpga/src/
125 hardware: cpu external pin ordering hellwig 3750d 17h /eco32/tags/eco32-0.24/fpga/src/
124 hardware: busctrl source formatted hellwig 3751d 02h /eco32/tags/eco32-0.24/fpga/src/
123 hardware: dsp now equivalent to port-15 hellwig 3751d 05h /eco32/tags/eco32-0.24/fpga/src/
122 hardware: in sdramcntl.v signal added to sensitivity list hellwig 3751d 11h /eco32/tags/eco32-0.24/fpga/src/
121 hardware: dsk source formatted hellwig 3751d 15h /eco32/tags/eco32-0.24/fpga/src/
120 hardware: in cpu/sregs change signal names di->din, do->dout hellwig 3751d 17h /eco32/tags/eco32-0.24/fpga/src/
119 hardware: ram now equivalent to port-15 hellwig 3752d 03h /eco32/tags/eco32-0.24/fpga/src/
118 hardware: rom now equivalent to port-15 hellwig 3752d 16h /eco32/tags/eco32-0.24/fpga/src/
117 hardware: ser now equal to port-15 hellwig 3753d 11h /eco32/tags/eco32-0.24/fpga/src/
116 hardware: kbd now equal to port-15 hellwig 3753d 12h /eco32/tags/eco32-0.24/fpga/src/
81 hardware: cpu now has a bad address register hellwig 3766d 19h /eco32/tags/eco32-0.24/fpga/src/
75 hardware: cpu now equal to port-15 hellwig 3770d 09h /eco32/tags/eco32-0.24/fpga/src/
70 hardware: two timers hellwig 3771d 09h /eco32/tags/eco32-0.24/fpga/src/
69 hardware: timer counts clock cycles, counter is readable hellwig 3771d 12h /eco32/tags/eco32-0.24/fpga/src/
68 hardware: timer now equal to port-15 hellwig 3771d 16h /eco32/tags/eco32-0.24/fpga/src/
67 fpga implementation update hellwig 3771d 19h /eco32/tags/eco32-0.24/fpga/src/
27 fpga implementation unpacked hellwig 3776d 16h /eco32/tags/eco32-0.24/fpga/src/

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