OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] - Rev 351

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
351 Turn defines into parameters in eth_cop olof 4716d 16h /ethmac/branches/unneback/
350 Turn M[1-2]_ADDRESSED_S[1-2] defines into wires olof 4716d 17h /ethmac/branches/unneback/
349 Make all parameters configurable from top level olof 4717d 17h /ethmac/branches/unneback/
348 Added option to dump VCD files olof 4718d 16h /ethmac/branches/unneback/
347 Added information about running with Icarus Verilog olof 4718d 17h /ethmac/branches/unneback/
346 Updated project location olof 4718d 19h /ethmac/branches/unneback/
345 Temporarily disable failing tests olof 4718d 21h /ethmac/branches/unneback/
344 bit 9 in phy control register is self clearing olof 4724d 23h /ethmac/branches/unneback/
343 Address miss should not be asserted on short frames olof 4728d 19h /ethmac/branches/unneback/
342 Added cast to avoid inequality when comparing different data types olof 4728d 19h /ethmac/branches/unneback/
341 Reset AdressMiss signal on new frames to prevent reporting the old status if new frame is short olof 4728d 19h /ethmac/branches/unneback/
340 Don't fail if log dir already exists olof 4729d 16h /ethmac/branches/unneback/
339 Added basic support for Icarus Verilog olof 4730d 16h /ethmac/branches/unneback/
338 root 5522d 21h /ethmac/branches/unneback/
335 New directory structure. root 5580d 03h /ethmac/branches/unneback/
334 Minor fixes for Icarus simulator. igorm 7028d 05h /ethmac/branches/unneback/
333 Some small fixes + some troubles fixed. igorm 7028d 17h /ethmac/branches/unneback/
332 Case statement improved for synthesys. igorm 7041d 22h /ethmac/branches/unneback/
331 Tests for delayed CRC and defer indication added. igorm 7057d 00h /ethmac/branches/unneback/
330 Warning fixes. igorm 7057d 00h /ethmac/branches/unneback/
329 Defer indication fixed. igorm 7057d 01h /ethmac/branches/unneback/
328 Delayed CRC fixed. igorm 7057d 01h /ethmac/branches/unneback/
327 Defer indication fixed. igorm 7057d 01h /ethmac/branches/unneback/
326 Delayed CRC fixed. igorm 7057d 02h /ethmac/branches/unneback/
325 Defer indication fixed. igorm 7057d 02h /ethmac/branches/unneback/
323 Accidently deleted line put back. igorm 7354d 02h /ethmac/branches/unneback/
321 - Bug connected to the TX_BD_NUM_Wr signal fixed (bug came in with the
previous update of the core.
- TxBDAddress is set to 0 after the TX is enabled in the MODER register.
- RxBDAddress is set to r_TxBDNum<<1 after the RX is enabled in the MODER
register. (thanks to Mathias and Torbjorn)
- Multicast reception was fixed. Thanks to Ulrich Gries
igorm 7357d 21h /ethmac/branches/unneback/
320 TX_BD_NUM_Wr error fixed. Error was entered with the last check-in. igorm 7358d 01h /ethmac/branches/unneback/
319 Latest Ethernet IP core testbench. tadejm 7388d 21h /ethmac/branches/unneback/
318 Latest Ethernet IP core testbench. tadejm 7388d 21h /ethmac/branches/unneback/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.