OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [branches/] [unneback/] - Rev 87

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
87 Status was not latched correctly sometimes. Fixed. mohor 8177d 07h /ethmac/branches/unneback/
86 Big Endian problem when sending frames fixed. mohor 8178d 14h /ethmac/branches/unneback/
85 Log info was missing. mohor 8183d 23h /ethmac/branches/unneback/
84 LinkFail signal was not latching appropriate bit. mohor 8184d 00h /ethmac/branches/unneback/
83 MAC address recognition was not correct (bytes swaped). mohor 8184d 00h /ethmac/branches/unneback/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8184d 01h /ethmac/branches/unneback/
81 Typos fixed, INT_SOURCE and INT_MASK registers changed. mohor 8184d 02h /ethmac/branches/unneback/
80 Small fixes for external/internal DMA missmatches. mohor 8188d 04h /ethmac/branches/unneback/
79 RetryCntLatched was unused and removed from design mohor 8188d 04h /ethmac/branches/unneback/
78 WB_SEL_I was unused and removed from design mohor 8188d 04h /ethmac/branches/unneback/
77 Interrupts changed mohor 8188d 04h /ethmac/branches/unneback/
76 Interrupts changed in the top file mohor 8188d 04h /ethmac/branches/unneback/
75 r_Bro is used for accepting/denying frames mohor 8188d 04h /ethmac/branches/unneback/
74 Reset values are passed to registers through parameters mohor 8188d 04h /ethmac/branches/unneback/
73 Number of interrupts changed mohor 8188d 04h /ethmac/branches/unneback/
72 Retry is not activated when a Tx Underrun occured mohor 8192d 08h /ethmac/branches/unneback/
71 Address recognition system added. Buffer Descriptors changed. DMA section
changed. Ports changed.
mohor 8196d 09h /ethmac/branches/unneback/
70 Small fixes. mohor 8196d 10h /ethmac/branches/unneback/
69 Define missmatch fixed. mohor 8197d 07h /ethmac/branches/unneback/
68 Registered trimmed. Unused registers removed. mohor 8198d 07h /ethmac/branches/unneback/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8198d 07h /ethmac/branches/unneback/
66 Testbench fixed, code simplified, unused signals removed. mohor 8198d 13h /ethmac/branches/unneback/
65 Testbench fixed, code simplified, unused signals removed. mohor 8198d 13h /ethmac/branches/unneback/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8199d 03h /ethmac/branches/unneback/
63 RxAbort is connected differently. mohor 8199d 07h /ethmac/branches/unneback/
62 RxAbort is an output. No need to have is declared as wire. mohor 8199d 07h /ethmac/branches/unneback/
61 RxStartFrm cleared when abort or retry comes. mohor 8199d 08h /ethmac/branches/unneback/
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8199d 09h /ethmac/branches/unneback/
59 Changes that were lost when updating from 1.11 to 1.14 fixed. mohor 8199d 09h /ethmac/branches/unneback/
58 File format changed. mohor 8199d 09h /ethmac/branches/unneback/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.