OpenCores
URL https://opencores.org/ocsvn/ethmac/ethmac/trunk

Subversion Repositories ethmac

[/] [ethmac/] [tags/] [rel_20/] [rtl/] - Rev 92

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
92 Some defines that are used in testbench only were moved to tb_eth_defines.v
file.
mohor 8132d 06h /ethmac/tags/rel_20/rtl/
91 Comments in Slovene language removed. mohor 8132d 06h /ethmac/tags/rel_20/rtl/
90 casex changed with case, fifo reset changed. mohor 8132d 06h /ethmac/tags/rel_20/rtl/
88 rx_fifo was not always cleared ok. Fixed. mohor 8142d 03h /ethmac/tags/rel_20/rtl/
87 Status was not latched correctly sometimes. Fixed. mohor 8142d 05h /ethmac/tags/rel_20/rtl/
86 Big Endian problem when sending frames fixed. mohor 8143d 12h /ethmac/tags/rel_20/rtl/
85 Log info was missing. mohor 8148d 22h /ethmac/tags/rel_20/rtl/
84 LinkFail signal was not latching appropriate bit. mohor 8148d 22h /ethmac/tags/rel_20/rtl/
83 MAC address recognition was not correct (bytes swaped). mohor 8148d 22h /ethmac/tags/rel_20/rtl/
82 Byte ordering changed (Big Endian used). casex changed with case because
Xilinx Foundation had problems. Tested in HW. It WORKS.
mohor 8149d 00h /ethmac/tags/rel_20/rtl/
80 Small fixes for external/internal DMA missmatches. mohor 8153d 02h /ethmac/tags/rel_20/rtl/
79 RetryCntLatched was unused and removed from design mohor 8153d 03h /ethmac/tags/rel_20/rtl/
78 WB_SEL_I was unused and removed from design mohor 8153d 03h /ethmac/tags/rel_20/rtl/
77 Interrupts changed mohor 8153d 03h /ethmac/tags/rel_20/rtl/
76 Interrupts changed in the top file mohor 8153d 03h /ethmac/tags/rel_20/rtl/
75 r_Bro is used for accepting/denying frames mohor 8153d 03h /ethmac/tags/rel_20/rtl/
74 Reset values are passed to registers through parameters mohor 8153d 03h /ethmac/tags/rel_20/rtl/
73 Number of interrupts changed mohor 8153d 03h /ethmac/tags/rel_20/rtl/
72 Retry is not activated when a Tx Underrun occured mohor 8157d 06h /ethmac/tags/rel_20/rtl/
70 Small fixes. mohor 8161d 08h /ethmac/tags/rel_20/rtl/
69 Define missmatch fixed. mohor 8162d 06h /ethmac/tags/rel_20/rtl/
68 Registered trimmed. Unused registers removed. mohor 8163d 05h /ethmac/tags/rel_20/rtl/
67 EXTERNAL_DMA used instead of WISHBONE_DMA. mohor 8163d 06h /ethmac/tags/rel_20/rtl/
65 Testbench fixed, code simplified, unused signals removed. mohor 8163d 12h /ethmac/tags/rel_20/rtl/
64 Status was not written correctly when frames were discarted because of
address mismatch.
mohor 8164d 02h /ethmac/tags/rel_20/rtl/
63 RxAbort is connected differently. mohor 8164d 05h /ethmac/tags/rel_20/rtl/
62 RxAbort is an output. No need to have is declared as wire. mohor 8164d 05h /ethmac/tags/rel_20/rtl/
61 RxStartFrm cleared when abort or retry comes. mohor 8164d 07h /ethmac/tags/rel_20/rtl/
60 Changes that were lost when updating from 1.5 to 1.8 fixed. mohor 8164d 07h /ethmac/tags/rel_20/rtl/
59 Changes that were lost when updating from 1.11 to 1.14 fixed. mohor 8164d 08h /ethmac/tags/rel_20/rtl/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.