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[/] [ethmac/] [tags/] [rel_22/] - Rev 50

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Rev Log message Author Age Path
50 checks destination address for Unicast, Multicast and Broadcast ops billditt 8148d 21h /ethmac/tags/rel_22/
49 HASH0 and HASH1 register read/write added. mohor 8150d 19h /ethmac/tags/rel_22/
48 RxOverRun added to statuses. mohor 8150d 23h /ethmac/tags/rel_22/
47 HASH0 and HASH1 registers added. Registers address width was
changed to 8 bits.		 mohor 8150d 23h /ethmac/tags/rel_22/
46 HASH0 and HASH1 registers added. mohor 8150d 23h /ethmac/tags/rel_22/
45 Ethernet Datasheet added. mohor 8151d 05h /ethmac/tags/rel_22/
44 Ethernet Datasheet added to cvs. mohor 8151d 05h /ethmac/tags/rel_22/
43 Tx status is written back to the BD. mohor 8152d 06h /ethmac/tags/rel_22/
42 Rx status is written back to the BD. mohor 8154d 23h /ethmac/tags/rel_22/
41 non-DMA host interface added. Select the right configutation in eth_defines. mohor 8157d 02h /ethmac/tags/rel_22/
40 Both rx and tx part are finished. Tested with wb_clk_i between 10 and 200
MHz. Statuses, overrun, control frame transmission and reception still need
to be fixed.		 mohor 8157d 23h /ethmac/tags/rel_22/
39 Tx part finished. TxStatus needs to be fixed. Pause request needs to be
added.		 mohor 8162d 03h /ethmac/tags/rel_22/
38 Initial version. Equals to eth_wishbonedma.v at this moment. mohor 8171d 05h /ethmac/tags/rel_22/
37 Link in the header changed. mohor 8171d 05h /ethmac/tags/rel_22/
36 TX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8217d 03h /ethmac/tags/rel_22/
35 RX_BD_NUM changed to TX_BD_NUM. Few typos corrected. mohor 8220d 01h /ethmac/tags/rel_22/
34 RX_BD_NUM changed to TX_BD_NUM (holds number of TX descriptors
instead of the number of RX descriptors).		 mohor 8220d 01h /ethmac/tags/rel_22/
33 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8220d 05h /ethmac/tags/rel_22/
32 ETH_RX_BD_ADR register deleted. ETH_RX_BD_NUM is used instead. mohor 8220d 05h /ethmac/tags/rel_22/
31 RX_BD_NUM register added instead of the RB_BD_ADDR. mohor 8220d 06h /ethmac/tags/rel_22/
30 BD section updated. mohor 8222d 03h /ethmac/tags/rel_22/
29 Generic memory model is used. Defines are changed for the same reason. mohor 8242d 01h /ethmac/tags/rel_22/
28 New release. Name changed to lower case. mohor 8244d 17h /ethmac/tags/rel_22/
27 File names changed to lower case. mohor 8244d 17h /ethmac/tags/rel_22/
26 First release of product brief. mohor 8244d 17h /ethmac/tags/rel_22/
25 First release of product brief. mohor 8244d 17h /ethmac/tags/rel_22/
24 Log file added. mohor 8267d 04h /ethmac/tags/rel_22/
23 Number of addresses (wb_adr_i) minimized. mohor 8267d 04h /ethmac/tags/rel_22/
22 eth_timescale.v changed to timescale.v This is done because of the
simulation of the few cores in a one joined project.		 mohor 8267d 07h /ethmac/tags/rel_22/
21 Status signals changed, Adress decoding changed, interrupt controller
added.		 mohor 8268d 04h /ethmac/tags/rel_22/

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