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[/] [ethmac10g/] [tags/] [V10/] - Rev 74

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Rev Log message Author Age Path
72 New directory structure. root 5583d 10h /ethmac10g/tags/V10/
40 This commit was manufactured by cvs2svn to create tag 'V10'. 6597d 01h /tags/V10/
39 first version fisher5090 6597d 01h /trunk/
38 deleted fisher5090 6597d 02h /trunk/
37 no message fisher5090 6597d 02h /trunk/
36 no message godzilla 6660d 11h /trunk/
35 no message godzilla 6663d 10h /trunk/
34 Rewritten code. godzilla 6663d 10h /trunk/
33 Rewritten code. godzilla 6663d 11h /trunk/
32 no message fisher5090 6680d 19h /trunk/
31 no message fisher5090 6680d 19h /trunk/
30 no message fisher5090 6708d 18h /trunk/
29 no message fisher5090 6709d 03h /trunk/
28 First commit. 32-bit counter. Synthesizes with no errors in Xilinx XST. mvpratt 6711d 13h /trunk/
27 xilinx coregen fisher5090 6721d 18h /trunk/
26 good edition fisher5090 6721d 18h /trunk/
25 no message fisher5090 6721d 18h /trunk/
24 First cut. One of the main culprits for the timing violations. godzilla 6724d 10h /trunk/
23 First cut. Original code from Easic but add some extra controls. One of the main culprits for the timing violations. godzilla 6724d 10h /trunk/
22 First cut. Original code from Easic but add some extra controls. godzilla 6724d 10h /trunk/
21 First cut. Not thoroughly tested yet but still need to implement the configuration, non-crc version and stats.
So far Leonardo Precison indicates the design can run upto 101 MHz but need to remove the timing violations to increase speed.		 godzilla 6724d 10h /trunk/
20 First cut. Still need to update the document with design changes. godzilla 6724d 10h /trunk/
19 First cut. godzilla 6724d 10h /trunk/
18 works well fisher5090 6728d 23h /trunk/
17 crc test fisher5090 6729d 06h /trunk/
16 use counter fisher5090 6732d 15h /trunk/
15 crc module fisher5090 6732d 15h /trunk/
14 no more used fisher5090 6732d 15h /trunk/
13 first commit. not yet ready to compile mvpratt 6732d 15h /trunk/
12 200MHZ fisher5090 6733d 23h /trunk/

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