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[/] [ion/] [trunk/] [vhdl/] - Rev 229

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Rev Log message Author Age Path
227 Removed modules no longer used:
code_rom_pkg replaced by new package in SoC directory.
RS232 sub-modules replaced by new UART
ja_rd 4429d 18h /ion/trunk/vhdl/
226 Updated demo and test bench to use new SoC entity. ja_rd 4429d 18h /ion/trunk/vhdl/
225 Added utility functions for the initialization of BRAM memories. ja_rd 4429d 18h /ion/trunk/vhdl/
224 MCU entity gutted and transformed into a SoC entity
Different UART, new generics...
ja_rd 4429d 18h /ion/trunk/vhdl/
223 MCU entity renamed to SoC, moved to separate SoC directory ja_rd 4429d 18h /ion/trunk/vhdl/
218 UART bug fix: rx_rdy flag must be clear only when reading the rx buffer ja_rd 4433d 17h /ion/trunk/vhdl/
217 Removed another SoC file prematurely committed ja_rd 4440d 08h /ion/trunk/vhdl/
216 First draft of SoC removed.
I'll rename it from mips_mcu in order to keep the svn log.
ja_rd 4440d 08h /ion/trunk/vhdl/
215 First draft of MIPS SoC
Still unused by any of the code samples.
Eventually will replace the mips_mcu entity
ja_rd 4440d 08h /ion/trunk/vhdl/
214 Updated pre-generated 'Hello' demo, recompiled and retested with the latest changes. ja_rd 4440d 16h /ion/trunk/vhdl/
212 BUG FIX: sequences of back-to-back I/O reads or writes didn't work.
The stall conditions were wrong for those cases.
Minor cleanup of the comments
ja_rd 4440d 16h /ion/trunk/vhdl/
211 Included a simulated block of I/O regs in the test bench for easing some cache tests. ja_rd 4440d 17h /ion/trunk/vhdl/
207 Simulation memories now modelled with shared variables and not signals.
This improves simulation speed of large programs (e.g. Adventure) by orders of magnitude
ja_rd 4719d 12h /ion/trunk/vhdl/
206 Fixed SygnalSpy function calls for compatibility with older versions of Modelsim ja_rd 4719d 12h /ion/trunk/vhdl/
205 Fixed bug in test bench interface to CPU ja_rd 4740d 11h /ion/trunk/vhdl/
201 Minor fixes to code comments ja_rd 4754d 11h /ion/trunk/vhdl/
200 CPU interrupt input changed to 8-bit vector
Other modules changed accordingly
Interrupts still missing; this is just preparing the interface
ja_rd 4754d 11h /ion/trunk/vhdl/
194 Removed deprecated files from old TB version ja_rd 4756d 03h /ion/trunk/vhdl/
193 Major test bench reorganization:
1.- TB now uses same object code as synthesizable demo.
2.- TB now simulates full MPU system.
3.- Console logging moved to TB package.
4.- Code sample makefiles and modelsim script updated accordingly.
ja_rd 4756d 03h /ion/trunk/vhdl/
191 Separated object code stuff from mcu entity
Object code related stuff now lives in separate file
Makefiles for code samples updated accordingly
Old mcu template deprecated but still in place
ja_rd 4760d 12h /ion/trunk/vhdl/
188 updated hello demo mpu file ja_rd 4769d 05h /ion/trunk/vhdl/
171 CPU bug fix: MFC0 instructions aborted by privilege trap should not modify any register ja_rd 4799d 21h /ion/trunk/vhdl/
162 Fixed stupid mistake in headers (date of project) ja_rd 4806d 09h /ion/trunk/vhdl/
161 Added GPL license info to the vhdl headers
This project is becoming respectable :)
ja_rd 4806d 09h /ion/trunk/vhdl/
159 bug detected but not fixed in cpu
(1st instruction after entering user mode is executed in kernel mode)
ja_rd 4807d 18h /ion/trunk/vhdl/
158 removed file from TB directory which was committed by mistake ja_rd 4807d 18h /ion/trunk/vhdl/
157 Bug fix in the missing coprocesor exception.
The CPU was triggering a privilege exception for the mtc0 that went into user mode.
Logging HDL updated
ja_rd 4809d 04h /ion/trunk/vhdl/
153 Added R3000 compatible support for kernel/user state:
- Implemented KU/IE plus KUp/IEp and KUo/IEo status bits
- Updated startup and test code to account for changes
- Implemented bit DID NOT TEST rfe instruction (not used in code)
- Access to CP0 in user mode triggers 'CpU' trap
- Updated software simulator

Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.
ja_rd 4809d 13h /ion/trunk/vhdl/
152 Added R3000 compatible support for kernel/user state:
- Implemented KU/IE plus KUp/IEp and KUo/IEo status bits
- Updated startup and test code to account for changes
- Implemented bit DID NOT TEST rfe instruction (not used in code)
- Access to CP0 in user mode triggers 'CpU' trap
- Updated software simulator

Besides, the logging of HI/LO register changes has been temporarily disabled, there's an unfixed bug in it.
ja_rd 4809d 13h /ion/trunk/vhdl/
151 BUG FIX: major bugs fixed in cache module
1.- sram address was wrong (leftover from previous version)
2.- writes to unmapped areas were blocking the cache
3.- Sequence SW,LW produced a RAW data hazard in some cases
ja_rd 4809d 14h /ion/trunk/vhdl/

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