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33 - Wrote some comments.
- The Power Grid Package is finished!. Though... it should be called Power Cube Package.
jguarin2002 5398d 19h /jart/
32 Added floor2Row.vhd

Some changes pro code legibility.
jguarin2002 5402d 09h /jart/
31 A more comprehensive scan chain. jguarin2002 5402d 22h /jart/
30 floor1Row.vhd: an entire K comparison cells row, with parameterizable number of cells. jguarin2002 5404d 14h /jart/
29 kComparison signal control added. jguarin2002 5404d 14h /jart/
28 Ray Intersection Test, Pipe enable clock. jguarin2002 5404d 14h /jart/
27 GPL License. And comments removed. jguarin2002 5404d 15h /jart/
26 Independent "row through" signals for each cell in the row. jguarin2002 5404d 16h /jart/
25 floor0Row : an entire dot product cell rows. With parameterizable cell numbers. jguarin2002 5404d 16h /jart/
24 Typos...... jguarin2002 5404d 18h /jart/
23 A 1 stage pipe 3 operand simultaneous adder, with parameterizable width. jguarin2002 5404d 19h /jart/
22 Package file declarations :

Declared component for arithmetic functions.
jguarin2002 5404d 19h /jart/
21 A 1 stage minimun distance comparer.

This block turns out to be a collection of instances:

{LT+SCANFFx2}
jguarin2002 5404d 19h /jart/
20 I must check that there are no latches inferred in what I want to be DFF with enable signals.

The 1 stage pipe K comparison cell.
jguarin2002 5404d 19h /jart/
19 Added some control signals.
Added a 3 operands 36 bits adder (12 ns)-> 1 stage pipe.
Added a 18x18 bits multiplier (10 ns) -> 1 stage pipe.
So... the dot cell goes upwards on a two stage pipe:

STAGE1:{M(2,18)P1x3} STAGE2:{A(3,36)P1x1}
jguarin2002 5404d 20h /jart/
18 The GPL license. jguarin2002 5418d 01h /jart/
17 GPL license and Julian Guarin Authoring Copyright. jguarin2002 5418d 01h /jart/
16 Intersection Test Package file. jguarin2002 5418d 01h /jart/
15 Some clarification jguarin2002 5418d 01h /jart/
14 This is the ray tracing main block. The 3 level sphere ray intersection grid. jguarin2002 5418d 05h /jart/
13 A simple unneeded line (a unnecessary library invocation), was removed. jguarin2002 5428d 05h /jart/
12 A configurable chain size and stage width scan out. jguarin2002 5428d 12h /jart/
11 Added and modify some comments about the performance of this square root calc. jguarin2002 5428d 18h /jart/
10 Upload the uart serial interface license jguarin2002 5440d 23h /jart/
9 Codes on here are interfaces blocks. The plan is to upload two interfaces with the device: an uart RS232 serial interface, and a avalon bus interface.

In this revision it is to be uploaded a 460800 bps serial interface.
jguarin2002 5440d 23h /jart/
8 this blocks contains a package of combinatorial functions to perform square root in one or two clock cycles, it will depend on the synthesis platform you use. jguarin2002 5440d 23h /jart/
7 Ooops my mistake. this was not the files I wan intended to upload. jguarin2002 5440d 23h /jart/
6 this blocks contains a package of combinatorial functions to perform square root in one or two clock cycles, it will depend on the synthesis platform you use. jguarin2002 5440d 23h /jart/
5 Added contact email. jguarin2002 5442d 15h /jart/
4 block02.vhd: This code separates the calculation of dot product in bl00 and the comparison in bl01 in a two stage pipe. jguarin2002 5442d 15h /jart/

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