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[/] [minimips_superscalar/] - Rev 32

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Rev Log message Author Age Path
32 Delete syscop to upload a new one. mcafruni 1641d 11h /minimips_superscalar/
31 New top module. mcafruni 1641d 11h /minimips_superscalar/
30 Delete top module to upload a new one. mcafruni 1641d 11h /minimips_superscalar/
29 New banc register file. mcafruni 1641d 11h /minimips_superscalar/
28 Delete banc.vhd to upload a new one. mcafruni 1641d 11h /minimips_superscalar/
27 New bench on P1 tag. mcafruni 1641d 11h /minimips_superscalar/
26 Delete bench to upload a new one. mcafruni 1641d 11h /minimips_superscalar/
25 New bench mcafruni 1641d 11h /minimips_superscalar/
24 Delete bench to upload a new one. mcafruni 1641d 11h /minimips_superscalar/
23 Moving the benchmarks folder into the trunk folder. mcafruni 1647d 05h /minimips_superscalar/
22 Wrong code. (fi0.bin) But revealed a bug that needs attention. mcafruni 1647d 05h /minimips_superscalar/
21 Correcting codes that work in behavioral simulation but cause problems with implementation. There must be more to be corrected yet. In analysis ... mcafruni 1647d 05h /minimips_superscalar/
20 I've uncommented wait statement so that the benchmark to be loaded into the simulation. mcafruni 1681d 18h /minimips_superscalar/
19 mcafruni 2015d 10h /minimips_superscalar/
18 clock_gate.vhd: removed.
minimips.vhd: Clock2 input is wrongly connected to the clock signal (Do not ask me how that happened. I'm sorry.). The right thing is to be connected to the clock2 signal. Adjusted.		 mcafruni 2015d 10h /minimips_superscalar/
17 Removing unnecessary clock-gate architecture. mcafruni 2015d 11h /minimips_superscalar/
16 FIR filter with 36 coefficients. (binary to run) mcafruni 2048d 20h /minimips_superscalar/
15 FIR filter with 36 coefficients. mcafruni 2048d 20h /minimips_superscalar/
14 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 2052d 14h /minimips_superscalar/
13 Buble Sort algorithm. Four totally disorderly numbers are sorted in ascending order. Worst performance algorithm. mcafruni 2052d 14h /minimips_superscalar/
12 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 2052d 14h /minimips_superscalar/
11 Static Fast Fourier Transform COOLEY TUKEY algorithm to 8 samples. The signal must have zeros betwen non null samples to prevent multiplication by real and complex numbers, since the core don't have floating point. mcafruni 2052d 14h /minimips_superscalar/
10 Matrix/Vector multiplication by constant. (binary) mcafruni 2062d 13h /minimips_superscalar/
9 Matrix/Vector multiplication by constant. mcafruni 2062d 13h /minimips_superscalar/
8 mcafruni 2093d 11h /minimips_superscalar/
7 Uploading missing file 'pps_pf.vhd'. mcafruni 2093d 11h /minimips_superscalar/
6 This is the assembly gasm modified that include a multiplication instruction which operands are 16-bit wide. mcafruni 2106d 00h /minimips_superscalar/
5 6x6 Matrix multiplication (ingenuous algorithm)
msx.bin: uses 16-bit operands multiplication instruction (mult2 rd, rs, rt).
m6x.bin: uses 32-bit operands original multiplication instruction (mult rs, rt) and the move instruction (mflo rd) after.		 mcafruni 2106d 08h /minimips_superscalar/
4 It needs to be tested on more useful and real benchmarks to reveal possible instruction sequences not supported by the architecture. Suggestions are welcome. mcafruni 2106d 08h /minimips_superscalar/
3 mcafruni 2106d 09h /minimips_superscalar/

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