URL https://opencores.org/ocsvn/mkjpeg/mkjpeg/trunk

Subversion Repositories mkjpeg

[/] [mkjpeg/] - Rev 71

Rev	Log message	Author	Age	Path
71	write memory selection pipeline delay correction	mikel262	4265d 08h	/mkjpeg/
70		mikel262	4674d 07h	/mkjpeg/
69		mikel262	4674d 08h	/mkjpeg/
68		mikel262	4674d 08h	/mkjpeg/
67		mikel262	4674d 08h	/mkjpeg/
66	memory initialization updated	mikel262	4810d 10h	/mkjpeg/
65	Added VHDL equivalent for Verilog's HeaderRAM.v	mikel262	4952d 18h	/mkjpeg/
64	rel with YUV	mikel262	5260d 10h	/mkjpeg/
63	Added YUV input support.	mikel262	5262d 04h	/mkjpeg/
62		mikel262	5303d 08h	/mkjpeg/
61	Design now uses 4:2:2 chroma subsampling	mikel262	5303d 18h	/mkjpeg/
60		mikel262	5306d 07h	/mkjpeg/
59		mikel262	5306d 09h	/mkjpeg/
58	fix for C_EXTRA_LINES=0	mikel262	5306d 09h	/mkjpeg/
57	default max performance	mikel262	5306d 19h	/mkjpeg/
56	BUF_FIFO redesign, for memory/performance tradeoff	mikel262	5306d 20h	/mkjpeg/
55		mikel262	5317d 20h	/mkjpeg/
54		mikel262	5317d 20h	/mkjpeg/
53		mikel262	5317d 21h	/mkjpeg/
52	Redesigned BUF_FIFO.vhd to significantly reduce area utilization. Only memory optimized version now possible.	mikel262	5317d 21h	/mkjpeg/
51	fix in buf fifo (synthesis problem)	mikel262	5321d 19h	/mkjpeg/
50		mikel262	5322d 04h	/mkjpeg/
49	Added 16 bit RGB 565 input format.	mikel262	5322d 05h	/mkjpeg/
48		mikel262	5322d 05h	/mkjpeg/
47		mikel262	5322d 05h	/mkjpeg/
46	x1	mikel262	5331d 07h	/mkjpeg/
45	stall re-added	mikel262	5331d 07h	/mkjpeg/
44	stall re-added	mikel262	5331d 07h	/mkjpeg/
43	stall readded	mikel262	5331d 07h	/mkjpeg/
42	Added backpressure/stallability of output interface.	mikel262	5334d 19h	/mkjpeg/