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[/] [mlite/] [trunk/] [vhdl/] - Rev 72

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Rev Log message Author Age Path
72 accurate_timing, cleanup, pipeline rhoads 8049d 02h /mlite/trunk/vhdl/
71 removed pause in rhoads 8049d 02h /mlite/trunk/vhdl/
70 pipeline rhoads 8049d 02h /mlite/trunk/vhdl/
69 Added a third pipeline stage rhoads 8049d 02h /mlite/trunk/vhdl/
64 Altera rhoads 8057d 06h /mlite/trunk/vhdl/
63 From count.c rhoads 8057d 07h /mlite/trunk/vhdl/
62 updated LPM functions; mem_none->mem_fetch rhoads 8057d 07h /mlite/trunk/vhdl/
61 mem_none -> mem_fetch rhoads 8057d 07h /mlite/trunk/vhdl/
60 reset control rhoads 8057d 07h /mlite/trunk/vhdl/
59 Ascyn reset rhoads 8057d 07h /mlite/trunk/vhdl/
58 Altera rhoads 8057d 07h /mlite/trunk/vhdl/
57 Interface to Altera FPGA rhoads 8057d 07h /mlite/trunk/vhdl/
56 Altera, added byte_sel_reg for tigher timing and avoid possible glitches rhoads 8057d 07h /mlite/trunk/vhdl/
55 Altera rhoads 8057d 07h /mlite/trunk/vhdl/
51 GENERIC rhoads 8068d 02h /mlite/trunk/vhdl/
50 Update prototypes rhoads 8068d 02h /mlite/trunk/vhdl/
49 Fix pause while writting rhoads 8068d 02h /mlite/trunk/vhdl/
48 Altera rhoads 8068d 02h /mlite/trunk/vhdl/
47 Altera rhoads 8075d 03h /mlite/trunk/vhdl/
46 Comments cleanup rhoads 8075d 03h /mlite/trunk/vhdl/
45 Fixed signed 64-bit multiply rhoads 8152d 16h /mlite/trunk/vhdl/
44 Fixed signed 64-bit multiply rhoads 8152d 16h /mlite/trunk/vhdl/
43 Renamed M-lite to Plasma rhoads 8155d 03h /mlite/trunk/vhdl/
41 Changed name to M-lite to avoid trademark issues. rhoads 8187d 08h /mlite/trunk/vhdl/
40 Added comments rhoads 8187d 08h /mlite/trunk/vhdl/
39 Changed name to M-lite to avoid trademark issues. rhoads 8187d 08h /mlite/trunk/vhdl/
25 opcodes target rhoads 8212d 01h /mlite/trunk/vhdl/
24 Disable interrupts upon reset. rhoads 8212d 01h /mlite/trunk/vhdl/
23 Fixed div -x/y. rhoads 8212d 01h /mlite/trunk/vhdl/
19 Changed simili run to 40us. rhoads 8214d 02h /mlite/trunk/vhdl/

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