| Rev |
Log message |
Author |
Age |
Path |
| 335 |
Switched o8_version.vhd to integer generics to make assignment from higher-level tools simpler,
Uploaded new version of TaskMan.zip, which uses the newer components |
jshamlet |
246d 08h |
/open8_urisc/ |
| 334 |
Updated version register to match task switcher example and rom core for the romtape entity |
jshamlet |
247d 10h |
/open8_urisc/ |
| 333 |
Fixed missing semicolons in o8_sys_timer_ii.vhd,
Added faulting address capture in the RAM models,
Modified o8_ram_1k.vhd to use 32-bit WPR |
jshamlet |
247d 21h |
/open8_urisc/ |
| 332 |
Added initial version of task manager project |
jshamlet |
248d 00h |
/open8_urisc/ |
| 331 |
Added custom SPI LCD interface (pending receive side) and watchdog timer. Also modified system timer II to use aliases |
jshamlet |
248d 01h |
/open8_urisc/ |
| 330 |
Updated to route RAM write fault signal and force CPU interrupts to task manager requirements. |
jshamlet |
254d 08h |
/open8_urisc/ |
| 329 |
Added a core that specifically supports the task switcher software. It merges o8_int_mgr16 with a wide register, allowing full control of I/O peripherals by the task switcher software. This also allows the task switcher to be enabled for the full 16 I/O write qualification lines, which had previously only been supported in the task data setup. |
jshamlet |
254d 08h |
/open8_urisc/ |
| 328 |
Documentation cleanup. Also added operand definitions. |
jshamlet |
255d 05h |
/open8_urisc/ |
| 327 |
More bug fixes:
Added write qual line to LTC2355 interface, fixed bug where output data was duplicating the lower byte in the averager, added an initial romtape.hex file |
jshamlet |
255d 10h |
/open8_urisc/ |
| 326 |
Minor comment correction |
jshamlet |
261d 07h |
/open8_urisc/ |
| 325 |
Added the rest of the initializers to the signal assignments |
jshamlet |
261d 08h |
/open8_urisc/ |
| 324 |
Modified the Open8 version of the multi-channel roll average code to have separate interrupt enables for average and flush operations. Note that the flush status bit should be checked by software prior to use if the Autoflush_On_Reset generic is set TRUE.
Also adding the ROMTAPE entity, which acts as a serial-access ROM for storing strings, arrays, etc. in order to alleviate pressure on the primary program ROM. It is intended for use with loops that load fixed content from ROM. |
jshamlet |
261d 09h |
/open8_urisc/ |
| 323 |
Forgot to add files |
jshamlet |
262d 07h |
/open8_urisc/ |
| 322 |
Performance fixes for the LCD interface,
Fixed incorrect entity name for the dual LTC2355 IF,
Added a CPU-accessible 8-channel averager core and FIFO-style ROM |
jshamlet |
262d 07h |
/open8_urisc/ |
| 321 |
Fixed issue with parity flag in receiver sticking |
jshamlet |
366d 00h |
/open8_urisc/ |
| 320 |
Inverted flow control signals to match EIA-232 specification |
jshamlet |
368d 03h |
/open8_urisc/ |
| 319 |
Fixed off-by-one error in channel count |
jshamlet |
369d 06h |
/open8_urisc/ |
| 318 |
Added o8_scale_conv.vhd and intdiv.vhd |
jshamlet |
373d 08h |
/open8_urisc/ |
| 317 |
Altered the reinit signal on teh adc128s022.vhd driver to be optional, and removed the "dead" signal from the upper level o8_de0_nano_adc_if.vhd code. |
jshamlet |
387d 05h |
/open8_urisc/ |
| 316 |
More code cleanup and comments,
Removed INT_VECTOR_n constants, as they are superfluous. There are no reasonable situations in which the constants would be altered. |
jshamlet |
387d 05h |
/open8_urisc/ |
| 315 |
Added Terasic DE0 Nano ADC interface and rolling averager. |
jshamlet |
387d 06h |
/open8_urisc/ |
| 314 |
Code cleanup and added comments |
jshamlet |
387d 07h |
/open8_urisc/ |
| 313 |
Added all generics to package component |
jshamlet |
387d 08h |
/open8_urisc/ |
| 312 |
Added o8_timer24.vhd as a more flexible alternative to o8_sys_timer_ii.vhd.
Also cleaned up some comments in the HTML documentation |
jshamlet |
387d 09h |
/open8_urisc/ |
| 311 |
Updated documentation to reflect generic switch controlling ROR/ROL behavior and the carry bit |
jshamlet |
431d 05h |
/open8_urisc/ |
| 310 |
Added optional DACadv signal to advance the PWM engine using an external signal. This is used to synchronize the DAC with other DACs or for streaming multiple streams across a high-speed serial link. |
jshamlet |
458d 10h |
/open8_urisc/ |
| 309 |
Comment cleanup |
jshamlet |
468d 18h |
/open8_urisc/ |
| 308 |
|
jshamlet |
480d 01h |
/open8_urisc/ |
| 307 |
Fixed comments on o8_version.vhd |
jshamlet |
687d 10h |
/open8_urisc/ |
| 306 |
Moved REINIT_TASK_TABLE_PTR call to INITIALIZE_TASK_STACK |
jshamlet |
691d 12h |
/open8_urisc/ |
