Rev |
Log message |
Author |
Age |
Path |
181 |
Altered the RSP instruction to allow the stack pointed to either be restored from registers or stored to registers based on the status of a processor bit. Also modified LDX to simplify the address logic. |
jshamlet |
1619d 09h |
/open8_urisc/trunk/ |
180 |
Added additional Open8 compatible modules |
jshamlet |
1623d 13h |
/open8_urisc/trunk/ |
179 |
Replacing files accidentally deleted during check-in |
jshamlet |
1633d 08h |
/open8_urisc/trunk/ |
178 |
Adding Open8 toolset for pure assembly |
jshamlet |
1633d 09h |
/open8_urisc/trunk/ |
177 |
Fixed comments in RTC module |
jshamlet |
2943d 13h |
/open8_urisc/trunk/ |
176 |
Fixed documentation errors,
Modified uSec_Tick such that it is always generated regardless of the interval. |
jshamlet |
2948d 11h |
/open8_urisc/trunk/ |
175 |
Added 4 and 8-bit LCD interfaces with backlight and contrast DACs |
jshamlet |
2948d 16h |
/open8_urisc/trunk/ |
174 |
Added ROM/RAM wrappers |
jshamlet |
3143d 10h |
/open8_urisc/trunk/ |
173 |
Added a couple of useful interfaces for detecting button presses and clock changes. |
jshamlet |
3143d 11h |
/open8_urisc/trunk/ |
172 |
General code cleanup |
jshamlet |
3143d 11h |
/open8_urisc/trunk/ |
171 |
Fixed comments for offsets 0x0 - 0x3 to indicate the read value |
jshamlet |
3143d 11h |
/open8_urisc/trunk/ |
170 |
Added 24-bit resolution epoch timer / alarm clock |
jshamlet |
3143d 11h |
/open8_urisc/trunk/ |
169 |
Corrected issue with CMP and SBC generating an inverted carry flag and added new constants to the package file to simplify interfacing new modules. |
jshamlet |
3198d 11h |
/open8_urisc/trunk/ |
168 |
Simplified write data path logic,
Converted RTC to packed BCD,
Corrected several bugs in real time clock component, |
jshamlet |
3977d 08h |
/open8_urisc/trunk/ |
167 |
Updated CPU model; Pipelined ALU control signals to improve fMAX, corrected issue with interrupt controller priority not being obeyed, fixed bug in auto-indexing instructions where the upper register wasn't being properly incremented, cleaned up code to make the processor model easier to follow.
Added several useful modules that use the Open8 bus. |
jshamlet |
3985d 06h |
/open8_urisc/trunk/ |
166 |
fixed additional issues with range checking on PCREL relocations for open8, added test cases to verify, catch tree up with binutils datestamp 20120301 |
khays |
4549d 07h |
/open8_urisc/trunk/ |
165 |
fixed issues with PC relative fixups in the linker |
khays |
4550d 14h |
/open8_urisc/trunk/ |
164 |
Modified the data path to allow the bus to go idle while waiting for an interrupt. This makes it easier to debug code that uses the WAI instruction, as both Wr_Enable and Rd_Enable go low. |
jshamlet |
4621d 02h |
/open8_urisc/trunk/ |
163 |
sync with binutils 2.22.51.20111114 |
khays |
4658d 14h |
/open8_urisc/trunk/ |
162 |
Added optional generic to specify that the BRK instruction implements a WAit_for_Interrupt (WAI) instruction instead. Logically emulates INT, but without triggering a soft interrupt. Note that the NOP instruction maps to BRK, and will not function correctly if this option is set. |
jshamlet |
4711d 19h |
/open8_urisc/trunk/ |
161 |
synchronize binutils/ with gnu dev tree of 2.21.53.20110828 |
khays |
4735d 13h |
/open8_urisc/trunk/ |
160 |
synchronize binutils/gas with gnu dev tree of 2.21.53.20110828 |
khays |
4735d 13h |
/open8_urisc/trunk/ |
159 |
synchronize binutils/gold with gnu dev tree of 2.21.53.20110828 |
khays |
4735d 13h |
/open8_urisc/trunk/ |
158 |
synchronize binutils/opcodes with gnu dev tree of 2.21.53.20110828 |
khays |
4735d 13h |
/open8_urisc/trunk/ |
157 |
synchronize binutils/ld with gnu dev tree of 2.21.53.20110828 |
khays |
4735d 13h |
/open8_urisc/trunk/ |
156 |
Optimized for timing,
Flattened block structure to single entity. |
jshamlet |
4768d 09h |
/open8_urisc/trunk/ |
155 |
Fixed additional interrupt logic bug,
Optimized several blocks - including ALU, stack, program counter, and data path. |
jshamlet |
4769d 04h |
/open8_urisc/trunk/ |
154 |
Fixed problem with missing data path override in interrupt logic. Should resolve issues with processor crashing when an interrupt occurs as a STO instruction is being executed. |
jshamlet |
4774d 07h |
/open8_urisc/trunk/ |
153 |
Fixed bug in interrupt logic that caused stack pointer to increment if interrupt occurred as specific instructions were being decoded,
Fixed bug in interrupt logic where instruction caching would remain enabled during an interrupt, causing improper execution depending on what instruction was in the decode stage as the interrupt is trigered. |
jshamlet |
4801d 03h |
/open8_urisc/trunk/ |
152 |
Correct the descriptions for GMSK and SMSK instructions in the Open8 Assembly Language Reference |
khays |
4809d 05h |
/open8_urisc/trunk/ |