OpenCores
URL https://opencores.org/ocsvn/openmsp430/openmsp430/trunk

Subversion Repositories openmsp430

[/] [openmsp430/] - Rev 129

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
129 Update ChangeLog olivier.girard 4571d 19h /openmsp430/
128 Fixed CALL x(SR) bug (see Bugtracker http://opencores.org/bug,view,2111 ) olivier.girard 4571d 19h /openmsp430/
127 update changelog... olivier.girard 4607d 18h /openmsp430/
126 Remove freewrap642 directory.
Tools users now have to install TCL/TK instead.		 olivier.girard 4607d 18h /openmsp430/
125 update changelog... olivier.girard 4621d 21h /openmsp430/
124 Improved gdbproxy robustness.
Create a workaround to prevent GDB from freezing when single-stepping on a LPMx or a "JMP $-0" instruction.		 olivier.girard 4622d 08h /openmsp430/
123 update changelog... olivier.girard 4643d 19h /openmsp430/
122 Add coverage report generation (NCVERILOG only)
Add support for the ISIM Xilinx simulator.		 olivier.girard 4643d 19h /openmsp430/
121 Add a new FPGA example for the LX9 Microboard from Avnet.
Many thanks to Ricardo Ribalda Delgado for his contribution on this one :-)		 olivier.girard 4715d 20h /openmsp430/
120 update tools changelog... olivier.girard 4747d 03h /openmsp430/
119 Slight improvement of the gdbproxy to improve the support of the EMBSYSREGVIEW Eclipse plugin. olivier.girard 4747d 03h /openmsp430/
118 Changelog update (move to modified BSD license). olivier.girard 4747d 20h /openmsp430/
117 To facilitate commercial adoption of the openMSP430, the core has moved to a modified BSD license. olivier.girard 4747d 20h /openmsp430/
116 Update documentation to reflect the latest core updates. olivier.girard 4763d 21h /openmsp430/
115 Add linker script example. olivier.girard 4772d 20h /openmsp430/
114 Improved the VerifyCPU_ID procedure. olivier.girard 4775d 20h /openmsp430/
113 Created ChangeLog files... olivier.girard 4776d 20h /openmsp430/
112 Modified comment. olivier.girard 4780d 19h /openmsp430/
111 Re-organized the "openMSP430_defines.v" file.
Re-defined the CPU_ID register of the debug interface (in particular to support custom user versioning).
Added RTL configuration possibility to expand the peripheral address space from 512B (0x0000 to 0x0200) to up to 32kB (0x0000 to 0x8000).
As a consequence the per_addr bus width goes from 8 to 14 bits and the peripherals address decoders have been updated accordingly.		 olivier.girard 4781d 19h /openmsp430/
110 Rework of the GUI for the software development tools.
Added possibility to give custom information through the omsp_alias.xml file.		 olivier.girard 4782d 19h /openmsp430/
109 Update Xilinx FPGA example with the latest openMSP430 core RTL version. olivier.girard 4836d 04h /openmsp430/
108 Add serial debug interface tasks to the Actel fpga simulation environment. olivier.girard 4837d 17h /openmsp430/
107 Update Actel and Alter FPGA examples with the latest openMSP430 core RTL version. olivier.girard 4837d 17h /openmsp430/
106 Separated the Timer A defines from the openMSP430 ones.
Added the "dbg_en" port in order to allow a separate reset of the debug interface.
Added the "core_en" port (when cleared, the CPU will stop execution, the dbg_freeze signal will be set and the aclk & smclk will be stopped).
Renamed "per_wen" to "per_we" to prevent confusion with active low signals.
Removed to missing unused flops when the DBG_EN is not defined (thanks to Mihai contribution).		 olivier.girard 4837d 18h /openmsp430/
105 Removed dummy memory read access for the MOV/PUSH/CALL/RETI instructions.
These were not problematic but this is simply cleaner that way.		 olivier.girard 4852d 19h /openmsp430/
104 Update all FPGA example projects with the latest RTL version. olivier.girard 4856d 20h /openmsp430/
103 Removed the timescale from all RTL files.
Added possibility to exclude the "includes" statements from the RTL.		 olivier.girard 4858d 01h /openmsp430/
102 Fixed bug reported by Mihai ( http://opencores.org/bug,view,1955 ).
The following PUSH instructions are now working as expected:

- indexed mode: PUSH x(R1)
- indirect register mode: PUSH @R1
- indirect autoincrement: PUSH @R1+		 olivier.girard 4858d 18h /openmsp430/
101 Cosmetic change in order to prevent an X propagation whenever executing a byte instruction with an uninitialized memory location as source. olivier.girard 4858d 20h /openmsp430/
100 Update HTML documentation with Actel's FPGA implementation example (file & directory description section). olivier.girard 4861d 19h /openmsp430/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.