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Rev Log message Author Age Path
221 Move old Altera-DE1 project to the OBSOLETE directory.
Create new Altera-DE0-Nano-SoC project, also containing a small demo of the openGFX430 graphic controller.		 olivier.girard 2861d 16h /openmsp430/
220 Create OBSOLETE directory to store old FPGA projects olivier.girard 2861d 17h /openmsp430/
219 Update overview html file olivier.girard 2877d 16h /openmsp430/
218 Update Tools Changelog olivier.girard 2877d 17h /openmsp430/
217 Update openmsp430-gdb-proxy tool to fix Get Register procedure when using the TI GDB (thanks to Simon Fröhlich for this one). olivier.girard 2877d 17h /openmsp430/
216 Add new donate picture. olivier.girard 2877d 17h /openmsp430/
215 Update ChangeLog olivier.girard 3019d 17h /openmsp430/
214 Fix multiwindow environment issue & close window with 'X'. Thanks to Fabian Mauroner for this one olivier.girard 3019d 17h /openmsp430/
213 Update ChangeLogs olivier.girard 3136d 03h /openmsp430/
212 Update all FPGA project examples to support both MSPGCC and TI/RedHat GCC toolchains. olivier.girard 3136d 03h /openmsp430/
211 Add custom printf function to reduce program memory footprint (the TI/RH GCC version is huge). Note that this function was created by DJ Delorie ( http://www.delorie.com/ ) olivier.girard 3136d 03h /openmsp430/
210 Add support for both MSPGCC and TI/RH-GCC toolchains. Add detection of debug ports for OS-X. olivier.girard 3136d 04h /openmsp430/
209 Update ChangeLogs olivier.girard 3163d 17h /openmsp430/
208 Update tools to run with latest CPU core version. olivier.girard 3163d 17h /openmsp430/
207 Simulation now works seamlessly under Linux, OS-X and Windows (Cygwin) olivier.girard 3163d 17h /openmsp430/
206 Update ChangeLog olivier.girard 3260d 17h /openmsp430/
205 Thanks again to Johan W. good feedback, the following updates are implemented:
- Change code to fix delta cycle issues on some simulators in mixed VHDL/Verilog environment.
- Update oscillators enable generation to relax a critical timing paths in the ASIC version.
- Add option to scan fix inverted clocks in the ASIC version (disabled by default as this is supported by most tools).		 olivier.girard 3260d 17h /openmsp430/
204 Fix DMA interface RTL merge problem (defines got wrong values). Fix CDC issue with the timerA (thanks to Johan for catching that). olivier.girard 3267d 17h /openmsp430/
203 Update ChangeLog olivier.girard 3274d 16h /openmsp430/
202 Add DMA interface support + LINT cleanup olivier.girard 3274d 16h /openmsp430/
201 Update ChangeLog olivier.girard 3435d 16h /openmsp430/
200 Major verificaiton and benchmark update to support both MSPGCC and RedHat/TI GCC toolchains. olivier.girard 3435d 16h /openmsp430/
199 Update ChangeLog olivier.girard 3541d 18h /openmsp430/
198 Update GDB-Proxy to support new GCC/GDB compiler version from RedHat/TI olivier.girard 3541d 18h /openmsp430/
197 Fixed bug on the write strobe of the baudrate hi configuration register. olivier.girard 3792d 17h /openmsp430/
196 Update ChangeLog olivier.girard 3835d 16h /openmsp430/
195 Update HTML documentation with configurable number of IRQ option. olivier.girard 3835d 16h /openmsp430/
194 Update PDF and ODT documentation. olivier.girard 3835d 17h /openmsp430/
193 Update FPGA projects with latest core RTL changes. olivier.girard 3835d 17h /openmsp430/
192 Number of supported IRQs is now configurable to 14 (default), 30 or 62. olivier.girard 3835d 17h /openmsp430/

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